JTAG debuggers

[permal]

Looking over my wiring a fourth time, I found that I actually had switched two wires. And flash does uses 3.3V so I've set that in my config as well.

So now I'm now able to start the debugger, but I'm still getting some errors. I've tried values from 1-20000 for adapter_khz, but it is always results in the same errors. Ideas anyone?

Code: Select all

Info : clock speed 2000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32: Debug controller was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core was reset (pwrstat=0x5F, after clear 0x0F).
Info : accepting 'gdb' connection on tcp/3333
Error: cpu0: esp32_fetch_all_regs (line 190): DSR (80208413) indicates DIR instruction generated an exception!
Error: Exception reading ibreaka0!

Info : Target halted. PRO_CPU: PC=0x00000000 (active)    APP_CPU: PC=0x00000000 
esp32: target state: halted
Info : Use core0 of target 'esp32'
Error: cpu0: xtensa_read_memory (line 588): DSR (8000CC13) indicates DIR instruction generated an exception!
Warn : cpu0: Failed reading 7416 bytes at address 0x40090000
Error: no working area available, can't alloc space for stub code!
Error: Failed to load stub (-308)!
Error: Algorithm run faied (-308)!
Info : Auto-detected flash size 0 KB
Error: Failed to probe flash, size 0 KB
Error: cpu0: xtensa_read_memory (line 588): DSR (8000CC13) indicates DIR instruction generated an exception!
Warn : cpu0: Failed reading 1024 bytes at address 0x3FFAECE0
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32: Debug controller was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core was reset (pwrstat=0x5F, after clear 0x0F).
Info : Target halted. PRO_CPU: PC=0x400003C0 (active)    APP_CPU: PC=0x00000000 
esp32: target state: halted
Info : esp32: Core was reset (pwrstat=0x1F, after clear 0x0F).
Info : Target halted. PRO_CPU: PC=0x40000400 (active)    APP_CPU: PC=0x40000400 
esp32: target state: halted
Info : Target halted. PRO_CPU: PC=0x40080F0C (active)    APP_CPU: PC=0xF8001080 
Error: cpu0: xtensa_read_memory (line 588): DSR (8000CC13) indicates DIR instruction generated an exception!
Warn : cpu0: Failed reading 1024 bytes at address 0x3FFAEE44
Error: cpu0: xtensa_read_memory (line 588): DSR (8000CC13) indicates DIR instruction generated an exception!
Warn : cpu0: Failed reading 1024 bytes at address 0x3FFAECE0

[permal]

I'm still struggling to get this working. Any help would be appreciated.

[ESP_igrr]

Couple of questions: Which example are you running on the ESP32 when the issue happens? Which commit id of openocd-esp32 do you use?

[js1234]

Hello,

I got a similiar issue. I am using the lws-template app from lws.


Shown in openocd console output:

Code: Select all

Error: cpu0: esp32_fetch_all_regs (line 234): DSR (8011CC13) indicates DIR instruction generated an exception!
Info : Target halted. PRO_CPU: PC=0x40081164 (active)    APP_CPU: PC=0x400D2B56 
Error: cpu0: esp32_fetch_all_regs (line 234): DSR (8011CC13) indicates DIR instruction generated an exception!
Info : Target halted. PRO_CPU: PC=0x400E1B64 (active)    APP_CPU: PC=0x400D2B56 
Error: cpu0: esp32_fetch_all_regs (line 234): DSR (8000CC13) indicates DIR instruction generated an exception!
Error: cpu0: esp32_fetch_all_regs (line 234): DSR (8000CC13) indicates DIR instruction generated an exception!
Info : Target halted. PRO_CPU: PC=0x400E1B67 (active)    APP_CPU: PC=0x400D2B56 
Error: cpu0: esp32_fetch_all_regs (line 234): DSR (8000CC13) indicates DIR instruction generated an exception!
Error: cpu0: esp32_fetch_all_regs (line 234): DSR (8000CC13) indicates DIR instruction generated an exception!

When I update the template app to the version
"esp32: document gpio may conflict with jtag"
I get the same error as permal.

[ESP_igrr]

There was an issue with default LWS config that one of JTAG pins was used as a GPIO. Have you changed that GPIO setting?

[permal]

I'm not using any example, at the time I used an application with only a log statement in the app-main function.

Commit was cc5b0f7a0215e5c121f63d9c884176ca9627d9d2, which is still the latest.

[ESP_igrr]

When OpenOCD is reporting DSR errors, do you see any exceptions being printed on UART console?

[permal]

As I remember, the console show exactly the same as OCD is printing, but I'll double check this evening.

[ESP_igrr]

I meant UART console where logs are usually printed from the chip; not GDB console.

[permal]

I meant UART console where logs are usually printed from the chip; not GDB console.

Me too, but judging by your answer I'm remembering wrong. I'll check this afternoon.