"Sleep" mode in which IRAM and cache are preserved

djixon
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"Sleep" mode in which IRAM and cache are preserved

Postby djixon » Fri Apr 19, 2024 10:25 am

In Xtensa ISA documentation I found this:
The WAITI instruction sets the current interrupt level in the PS.INTLEVEL register. In
some implementations it also powers down the processor’s logic, and waits for an interrupt. After executing the interrupt handler, execution continues with the instruction following the WAITI.
Which ESP32 modules have that implemented? I mean which LX cores come with that implementation. Also, if it is supported in hardware, how that hardware implementation is handled by RTOS?
I mean, how to tell RTOS to suspend all cores (to turn off processor logic) and waits until some predetermined time elapses (in such mode of reduced power consumption), while preserving all the rest (ticking, IRAM, PSRAM ....), so when that interupt brings back processors "in life", it continues at exact program point execution after WAITI instruction.

ESP_Sprite
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Re: "Sleep" mode in which IRAM and cache are preserved

Postby ESP_Sprite » Fri Apr 19, 2024 11:37 am

All of them do. FreeRTOS detects when there's nothing better to do and runs the 'idle' task. This will put the core to sleep until the next tick interrupt or any other configured interrupt happens. Note that the core is only clockgated, not powered down, and all peripherals including the radios still function at full power, so don't expect too much in power savings from that.

djixon
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Re: "Sleep" mode in which IRAM and cache are preserved

Postby djixon » Fri Apr 19, 2024 12:50 pm

Thanks, for the fast reply. I understand that I have to turn off the radio (and all the other unnecessary things) to get better battery power savings in such a "almost like a sleep" mode.
FreeRTOS detects when there's nothing better to do and runs the 'idle' task.
But what if there are a lot of tasks running? And I want RTOS "hibernates" all of them and enters into such "idle sleep" for lets say 1 hour and after that time elapses, it recovers and continues where it was before "hiberrnate" with all those tasks preserved.

EDIT:
Can I write something like:

Code: Select all

vTaskSuspendAll();
taskDISABLE_INTERRUPTS();
sleep(3600);
taskENABLE_INTERRUPTS();
xTaskResumeAll();
Would that bring both cores into such "a sleep for an hour" state? Doesn't a CALL to that sleep() function after vTaskSuspendAll() keeps main task still running?

ESP_Sprite
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Re: "Sleep" mode in which IRAM and cache are preserved

Postby ESP_Sprite » Sat Apr 20, 2024 12:33 am

I think that code would crash: you're calling a blocking function in a critical section. In general: That sleep mode is not intended to manually call, to be honest; it's ideal for a RTOS idle scenario as the way it sleeps makes it trivial to implement, with the downside being that the savings are not as large as you would get when you manually go into a sleep mode. If you want to go into sleep mode yourself, it's probably better to look at the chip-level light sleep functionality.

djixon
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Joined: Sun Oct 01, 2023 7:48 pm

Re: "Sleep" mode in which IRAM and cache are preserved

Postby djixon » Sat Apr 20, 2024 1:06 pm

In TRM, sleep modes are not covered properly. At least you could put in documentation:
Each sleep mode, followed by what must be powered ON (for that mode) and what can be turned ON/OFF imediatelly followed by registers/functions for that control. Without that, you have to search through every f****** module and search for the registers (and their bits) which control that module sleeping/waking options.

That is nigthmare.

ESP_Sprite
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Re: "Sleep" mode in which IRAM and cache are preserved

Postby ESP_Sprite » Sat Apr 20, 2024 3:22 pm

Not sure what you're talking about, as the peripherals themselves don't have sleep options; that stuff is controlled centrally. For instance, the ESP32-C3 has a 'Low power management' chapter that discusses most if not all of them. I agree that there's no 'howto' in the TRM for this, but if needed you can browse the ESP-IDF code to get an idea of what needs to be done.

djixon
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Re: "Sleep" mode in which IRAM and cache are preserved

Postby djixon » Sat Apr 20, 2024 10:27 pm

Thanks for an advice, but that is actually what I am doing all the time because TRM skips a lot of details, not only about sleep modes but about very specific, but posible configuration options, and their impacts on behavior of working state of ESP. For example:
in sdkconfig there are options:

- Reduce PHY TX power when brownout reset
How does that exactly is performed? At hardware level? By some not exposed function? When regular power is returned? After regular reset? Wake from light sleep? (you see, a lot of resonable questions and there is no answer anywhere)

- Run freeRTOS only on the first core
Well, it is obvious what that option does. However, what happens if an interrupt raise? Is ISR handled only on core0? How do you start task on core1? As usual or you have to do some magic? Does that also means that schedular eliminates core1 as if it is not physically present? But if that is true, how do tasks get switched on core1? Simply, that option requires detail explanation probably occupying full page. But in sdkconfig under info there is single sentence. And what is the point of that INFO if most of infos is just copy->paste text from the name of the option???? That is not more informative than name of the option.

- configUSE_IDLE_HOOK
- What is the difference in between the FreeRTOS idle hook and ESP_IDF Idle Hook?

I could continue forever.... Simply, there have to be a pdf with detailed explanation of every single option in sdkconfig and its impact on ESP behavior.

chegewara
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Re: "Sleep" mode in which IRAM and cache are preserved

Postby chegewara » Wed Apr 24, 2024 12:38 am

Im not sure what you are trying to do, but did you try to use light sleep mode?
It will stop executing code on CPU/s, which will decrease a bit power consumption, and will keep all data in RAM.
All you need to stop wifi before enter light sleep mode to turn off radio.

djixon
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Joined: Sun Oct 01, 2023 7:48 pm

Re: "Sleep" mode in which IRAM and cache are preserved

Postby djixon » Wed Apr 24, 2024 7:55 am

Yes after suggestions given by ESP_Sprite. It works, but the way that light-sleep mode is covered in TRM, I never can be 100% sure, did I turn off all of what is possible to be turned off to bring chip in such "hibernation" state with theoretically minimal power consumption, where only RAM/PSRAM are preserved and both cores "throthling" or idling or what ever, until that 1h timer elapses. I mean there is no way to check is the chip really in such a state. The only way is to get an amp meter and measure current. But what should be expected current consumption in such a state (with 8MB PSRAM chip)?

chegewara
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Joined: Wed Jun 14, 2017 9:00 pm

Re: "Sleep" mode in which IRAM and cache are preserved

Postby chegewara » Wed Apr 24, 2024 8:11 am

When you enter light sleep mode then code running on regular CPUs is stopped, you can check it by adding print log right after it.
Code is resumed after waking up.
You can search about this API, which i am leaving ON to wake up with pins:

Code: Select all

esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON);
and like i mentioned, you have to stop wifi to turn off radio, because esp-idf API does not do it internally.

Another option to learn about peripherals and pins state is to check with devkit and LEDs if they stay on or will go off during light sleep.

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