Understanding ADC Continuous Mode Configuration in ESP32S2 Using IDF-5.1.1

swwdsy
Posts: 2
Joined: Thu Sep 21, 2023 2:17 am

Understanding ADC Continuous Mode Configuration in ESP32S2 Using IDF-5.1.1

Postby swwdsy » Fri Sep 22, 2023 7:15 am

Using ESP32S2 with IDF-5.1.1, I am performing continuous readings on 3 ADC channels.

According to the description in adc_continuous.h, conv_frame_size needs to be a multiple of SOC_ADC_DIGI_DATA_BYTES_PER_CONV, i.e., a multiple of 2.

Code: Select all

adc_continuous.h
/**
 * @brief ADC continuous mode driver initial configurations
 */
typedef struct {
    uint32_t max_store_buf_size;    ///< Max length of the conversion Results that driver can store, in bytes.
    uint32_t conv_frame_size;       ///< Conversion frame size, in bytes. This should be in multiples of `SOC_ADC_DIGI_DATA_BYTES_PER_CONV`.
} adc_continuous_handle_cfg_t;
I set conv_frame_size to channl * SOC_ADC_DIGI_DATA_BYTES_PER_CONV, which is 3 * 2. However, an error occurs.


In adc_hal.c, there is an assertion that requires it to be a multiple of 4.

Code: Select all

adc_hal.c: 
static void adc_hal_digi_dma_link_descriptors(dma_descriptor_t *desc, uint8_t *data_buf, uint32_t per_eof_size, uint32_t eof_step, uint32_t eof_num)
{
    HAL_ASSERT(((uint32_t)data_buf % 4) == 0);
    HAL_ASSERT((per_eof_size % 4) == 0);
}
So, I tried changing the conv_frame_size from the previous 6 to 8, and the error no longer occurs.

Is the statement in adc_continuous.h incorrect, or have I misunderstood something?

ScumCoder
Posts: 4
Joined: Sat Feb 03, 2024 9:04 pm

Re: Understanding ADC Continuous Mode Configuration in ESP32S2 Using IDF-5.1.1

Postby ScumCoder » Sun Mar 03, 2024 5:56 am

I gave the IDF source code a look and this definitely smells like a bug to me.
A quick search through gitlab issues didn't show anything similar, so I suggest you to open one.

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