Two ESP32 S3 on one PCB - how to debug & download firmware?

[ricoli]

My PCB holds two ESP32-S3: schematics like shown on picture attached.

EN, BOOT, Rx0 and TX0 are connected.

EN resets both SoCs when powering up.

But there is only one USB connection on this PCB, which is conneced to the first SoC.

I can upload firmware and debug this first SoC - this works just fine.

Now can I use this USB connection on the first SoC also to download firmware to the second SoC?

I am wondering if I can set the correct mapping registers for JTAG/USB, may be?
But I did not understand, which registers to set and how?

I am referring to ESP32 S3 Reference Manual - see second jpg attached Debug2ndSoC2.jpg.

[ESP_Sprite]

That remark goes for the JTAG pins, not for the serial ones. You'll need to write some software (for the 1st ESP32S3) that reads bytes from the USB-serial-JTAG serial port and write it to an UART connected to the 2nd ESP32, but note that you may need to mess with the reset sequence in e.g. esptool, as it will still try to reset the 1st ESP32 otherwise.

[ricoli]

Sorry, I am totally new to this topic and I most probably mix something up, here.

So MTDO and MTDI are not equal with RX0 TX0 ?

There is this other picture in the documentation ( see attached )

And this Register-bit USB_JTAG_BRIDGE_ENABLE in Register USB_SERIAL_JTAG_CONF0_REG (0x0018) looks to me as it transparently re-routes this SOC's USB Interface to its GPIO Matrix - which then can be routed to the other SoC and there can be used as a JTAG input?

So on the first SoC I would have set USB_JTAG_BRIDGE_ENABLE =1 and on second SoC I would have set efuse_strap_jtag_sel.

But may be my thinking is (completely) wrong?

What is USB_JTAG_BRIDGE_ENABLE used for, please?

[ESP_Sprite]

So MTDO and MTDI are not equal with RX0 TX0 ?

Nope. The first are two out of four JTAG signals, the second are serial signals. Different protocols, like e.g. USB and HDMI.

And this Register-bit USB_JTAG_BRIDGE_ENABLE in Register USB_SERIAL_JTAG_CONF0_REG (0x0018) looks to me as it transparently re-routes this SOC's USB Interface to its GPIO Matrix - which then can be routed to the other SoC and there can be used as a JTAG input?

So on the first SoC I would have set USB_JTAG_BRIDGE_ENABLE =1 and on second SoC I would have set efuse_strap_jtag_sel.

This is correct. Note that this only redirects JTAG, so you need to use OpenOCD or some other JTAG software to flash the device; esptool.py works via serial and will not work.

[ricoli]

> The first are two out of four JTAG signals, the second are serial signals.

Thank you for the clarification.
I checked again and now detected that TX0 RX0 are with GPIO43 44 while MTDO MTDI are with GPIO40 41. So this will indeed not be the way forward for me.

My development/debug environment is VSCODE with ESP IDF. Connected to USB+ USB- of the first ESP32. This works very well. And it was easy to set up. And I believe ESP IDF in VSCODE is using esptool.py.

From a HW point of view I can fully customize the first ESP32 to my requirements. The second ESP32 on the other hand is fixed and has this DEBUG Interface - see picture below.

Now what I "dream of" is (after some hardware redesign?) - a "software switch", which i can actvate in the first ESP32 so that the next flash/debug session from VSCODE/ESP IDF will be routed to the second ESP32. Is there a soultion for this? Or are we back to what you mentioned earlier (writing some code talking to the UART of the second ESP32 and may be messing up with resetting the wrong ESP32)?

[ESP_Sprite]

Yep; you can simply write software to shuttle data between the USB-serial-JTAG and an UART connected to the debug port of the 2nd ESP32, as long as you don't use the reset functionality. As an alternative, you could also embed the software for the 2nd ESP32 into the 1st ESP32s firmware image and use esp-serial-flasher to have the 1st ESP32 flash it into the 2nd.