[Latest Update] ESP32 Hardware Reference Design

[KevinA]

I can't find where to post documentation errors:
ESP32 Datasheet 3.1.3 External Flash and SRAM
"ESP32 supports 4 X 16 MBytes of external QSPI Flash" this indicates 4 times 16MBytes

"ESP32 supports up to 128 Mbits of external DUAL or QUAD SPI Flash memory"

The SRAM issue:
On the IO_MUX page where is the address and data pins for a SRAM chip? How do I tell the memory controller?
Am I not looking in the right PDF?

I just downloaded everything earlier this morning and now you've pointed to version 1.1 !
Update: The link points to a page where the labels have rev numbers but the documentation is the same.
Can you throw me a hint which PDF contains the description on GPIO Mapping?
Thanks

[WiFive]

I can't find where to post documentation errors:
ESP32 Datasheet 3.1.3 External Flash and SRAM
"ESP32 supports 4 X 16 MBytes of external QSPI Flash" this indicates 4 times 16MBytes

"ESP32 supports up to 128 Mbits of external DUAL or QUAD SPI Flash memory"

The SRAM issue:
On the IO_MUX page where is the address and data pins for a SRAM chip? How do I tell the memory controller?
Am I not looking in the right PDF?

I just downloaded everything earlier this morning and now you've pointed to version 1.1 !
Update: The link points to a page where the labels have rev numbers but the documentation is the same.
Can you throw me a hint which PDF contains the description on GPIO Mapping?
Thanks

Technical reference manual section 4 and pin list document. SRAM would use SPI0. I don't know if it is fully supported yet in software. https://github.com/espressif/esp-idf/bl ... 2/spiram.h

[KevinA]

SPIRAM:
MR25H40MDF 4M as 512KX8 $21.82 qty 1
Earlier I had read we could add external SRAM as IRAM... I don't think so, maybe after it's moved into IRAM but this SPIRAM stuff is painful to work with. It has 1 byte writes, after you set it up and 40 clock cycles later your done. I could see it as a buffer to save the flash from being over used, maybe chaining DMA to the SPI....
Interesting -> http://www.computerworld.com/article/30 ... vices.html

[ESP_Sprite]

For now, external SRAM is only really usable by either using it as a generic external SPI device or by using a SPI channel with DMA to essentially copy data to or from it. In theory, we also have a way to map 4MB of SRAM into into the D-bus (so you can basically use it in the same way as you can use DRAM that is inside the ESP32) but there's something funny going on with that; it'll probably cost us 2 to 3 months to fix this.

[rudi ;-)]

Hi Folks

updates available

ESP32 Hardware Design Guidelines V3.0 2020.09.25
The guidelines outline recommended design practices when developing standalone or add-on systems based on the ESP32 series of products, including ESP32 SoCs, ESP32 modules and ESP32 development boards.


ESP32 硬件设计指南 V3.0 2020年09月25日
《ESP32 硬件设计指南》主要提供了在使用 ESP32 系列产品进行电路设计和 PCB 布局时需注意的事项。本文还简要介绍了 ESP32 系列产品的硬件信息，包括 ESP32 芯片、模组、开发板以及典型应用方案等。


also for History here attached EN and CN Version

esp32_hardware_design_guidelines_en.pdf

ESP32 Hardware Design Guidelines
V3.0 2020.09.25

(6.32 MiB) Downloaded 972 times

esp32_hardware_design_guidelines_cn.pdf

ESP32 硬件设计指南
V3.0 2020年09月25日

(3.73 MiB) Downloaded 770 times

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best wishes
rudi