RTC_NOINIT_ATTR and USB Serial/JTAG Controller vs External USB<->Serial

[powerfeather]

I have found a bizarre behavior, and I was wondering if anybody can reproduce this on ESP32-S3-Devkit-C-1 v1.0 and ESP-IDF v4.4.6.

I built and flashed an application with the following main code:

Code: Select all

void app_main(void)
{
    static RTC_NOINIT_ATTR uint32_t test;
    printf("test: 0x%08x\n", test); 
    test = 0xdeadbeef;
    printf("test: 0x%08x\n", test);
}

I've also configured the project to have primary console using external USB<->Serial chip on UART0, and secondary console using the internal USB/JTAG controller. This is so I can test the same app using the USB port and UART port conneciton.

Anyways, I expect the first print to output some random number after a reset (pressing the RESET button on the devkit), and the second one would be 0xdeadbeef. This is what I see when I connect the devkit using the UART port:

Code: Select all

ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3808,len:0x166c
load:0x403c9700,len:0xbd4
load:0x403cc700,len:0x3034
entry 0x403c9954
I (24) boot: ESP-IDF v4.4.6-56-g987a77505b-dirty 2nd stage bootloader
I (25) boot: compile time 10:33:41
I (25) boot: Multicore bootloader
I (28) boot: chip revision: v0.0
I (32) boot.esp32s3: Boot SPI Speed : 80MHz
I (37) boot.esp32s3: SPI Mode       : DIO
I (42) boot.esp32s3: SPI Flash Size : 4MB
I (47) boot: Enabling RNG early entropy source...
I (52) boot: Partition Table:
I (56) boot: ## Label            Usage          Type ST Offset   Length
I (63) boot:  0 nvs              WiFi data        01 02 0000b000 00005000
I (70) boot:  1 otadata          OTA data         01 00 00010000 00002000
I (78) boot:  2 phy_init         RF data          01 01 00012000 00001000
I (85) boot:  3 factory          factory app      00 00 00020000 00260000
I (93) boot:  4 ota_0            OTA app          00 10 00280000 00010000
I (100) boot:  5 ota_1            OTA app          00 11 00290000 00010000
I (108) boot:  6 flash_test       Unknown data     01 81 002a0000 00084000
I (115) boot:  7 nvs_key          NVS keys         01 04 00324000 00001000
I (123) boot: End of partition table
I (127) boot: Defaulting to factory image
I (132) esp_image: segment 0: paddr=00020020 vaddr=3c080020 size=16888h ( 92296) map
I (157) esp_image: segment 1: paddr=000368b0 vaddr=3fc98840 size=0401ch ( 16412) load
I (161) esp_image: segment 2: paddr=0003a8d4 vaddr=40374000 size=05744h ( 22340) load
I (168) esp_image: segment 3: paddr=00040020 vaddr=42000020 size=7720ch (487948) map
I (259) esp_image: segment 4: paddr=000b7234 vaddr=40379744 size=0f0f8h ( 61688) load
I (272) esp_image: segment 5: paddr=000c6334 vaddr=600fe000 size=0002ch (    44) load
I (281) boot: Loaded app from partition at offset 0x20000
I (281) boot: Disabling RNG early entropy source...
I (293) cpu_start: Multicore app
I (293) cpu_start: Pro cpu up.
I (293) cpu_start: Starting app cpu, entry point is 0x403755ec
0x403755ec: call_start_cpu1 at /home/powerfeather/Projects/esp-idf/components/esp_system/port/cpu_start.c:151

I (0) cpu_start: App cpu up.
I (310) cpu_start: Pro cpu start user code
I (310) cpu_start: cpu freq: 160000000
I (310) cpu_start: Application information:
I (313) cpu_start: Project name:     test-app
I (318) cpu_start: App version:      54b2e48-dirty
I (323) cpu_start: Compile time:     Oct 17 2023 10:33:37
I (329) cpu_start: ELF file SHA256:  9bb26ba61ba31495...
I (335) cpu_start: ESP-IDF:          v4.4.6-56-g987a77505b-dirty
I (342) cpu_start: Min chip rev:     v0.0
I (347) cpu_start: Max chip rev:     v0.99 
I (351) cpu_start: Chip rev:         v0.0
I (356) heap_init: Initializing. RAM available for dynamic allocation:
I (364) heap_init: At 3FCA04F0 len 00049220 (292 KiB): D/IRAM
I (370) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DIRAM
I (377) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (383) heap_init: At 600FE02C len 00001FD4 (7 KiB): RTCRAM
I (390) spi_flash: detected chip: generic
I (394) spi_flash: flash io: dio
W (398) spi_flash: Detected size(8192k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
I (411) sleep: Configure to isolate all GPIO pins in sleep state
I (418) sleep: Enable automatic switching of GPIO sleep configuration
I (425) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
test: 0xa5bba835
test: 0xdeadbeef

But not with the USB port on the devkit:

Code: Select all

ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x15 (USB_UART_CHIP_RESET),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x42073d4a
0x42073d4a: esp_pm_impl_waiti at /home/powerfeather/Projects/esp-idf/components/esp_pm/pm_impl.c:849

SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3808,len:0x166c
load:0x403c9700,len:0xbd4
load:0x403cc700,len:0x3034
entry 0x403c9954
I (24) boot: ESP-IDF v4.4.6-56-g987a77505b-dirty 2nd stage bootloader
I (25) boot: compile time 10:33:41
I (25) boot: Multicore bootloader
I (28) boot: chip revision: v0.0
I (32) boot.esp32s3: Boot SPI Speed : 80MHz
I (37) boot.esp32s3: SPI Mode       : DIO
I (42) boot.esp32s3: SPI Flash Size : 4MB
I (46) boot: Enabling RNG early entropy source...
I (52) boot: Partition Table:
I (55) boot: ## Label            Usage          Type ST Offset   Length
I (63) boot:  0 nvs              WiFi data        01 02 0000b000 00005000
I (70) boot:  1 otadata          OTA data         01 00 00010000 00002000
I (78) boot:  2 phy_init         RF data          01 01 00012000 00001000
I (85) boot:  3 factory          factory app      00 00 00020000 00260000
I (93) boot:  4 ota_0            OTA app          00 10 00280000 00010000
I (100) boot:  5 ota_1            OTA app          00 11 00290000 00010000
I (108) boot:  6 flash_test       Unknown data     01 81 002a0000 00084000
I (115) boot:  7 nvs_key          NVS keys         01 04 00324000 00001000
I (123) boot: End of partition table
I (127) boot: Defaulting to factory image
I (132) esp_image: segment 0: paddr=00020020 vaddr=3c080020 size=16888h ( 92296) map
I (157) esp_image: segment 1: paddr=000368b0 vaddr=3fc98840 size=0401ch ( 16412) load
I (161) esp_image: segment 2: paddr=0003a8d4 vaddr=40374000 size=05744h ( 22340) load
I (167) esp_image: segment 3: paddr=00040020 vaddr=42000020 size=7720ch (487948) map
I (259) esp_image: segment 4: paddr=000b7234 vaddr=40379744 size=0f0f8h ( 61688) load
I (272) esp_image: segment 5: paddr=000c6334 vaddr=600fe000 size=0002ch (    44) load
I (281) boot: Loaded app from partition at offset 0x20000
I (281) boot: Disabling RNG early entropy source...
I (293) cpu_start: Multicore app
I (293) cpu_start: Pro cpu up.
I (293) cpu_start: Starting app cpu, entry point is 0x403755ec
0x403755ec: call_start_cpu1 at /home/powerfeather/Projects/esp-idf/components/esp_system/port/cpu_start.c:151

I (0) cpu_start: App cpu up.
I (311) cpu_start: Pro cpu start user code
I (311) cpu_start: cpu freq: 160000000
I (311) cpu_start: Application information:
I (313) cpu_start: Project name:     test-app
I (318) cpu_start: App version:      54b2e48-dirty
I (324) cpu_start: Compile time:     Oct 17 2023 10:33:37
I (330) cpu_start: ELF file SHA256:  9bb26ba61ba31495...
I (336) cpu_start: ESP-IDF:          v4.4.6-56-g987a77505b-dirty
I (343) cpu_start: Min chip rev:     v0.0
I (347) cpu_start: Max chip rev:     v0.99 
I (352) cpu_start: Chip rev:         v0.0
I (357) heap_init: Initializing. RAM available for dynamic allocation:
I (364) heap_init: At 3FCA04F0 len 00049220 (292 KiB): D/IRAM
I (371) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DIRAM
I (377) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (384) heap_init: At 600FE02C len 00001FD4 (7 KiB): RTCRAM
I (391) spi_flash: detected chip: generic
I (395) spi_flash: flash io: dio
W (399) spi_flash: Detected size(8192k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
I (412) sleep: Configure to isolate all GPIO pins in sleep state
I (418) sleep: Enable automatic switching of GPIO sleep configuration
I (426) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
test: 0xdeadbeef
test: 0xdeadbeef

The reset reason is also different, its POWERON with the UART port but USB_UART_CHIP_RESET with the USB port. Is it related to that, since based on the docs USB_UART_CHIP_RESET is only a core-level reset. I'm pressing the RESET button though, which I think should be a chip-level reset. Even if it's not, the behavior above holds even if I physically plug-out and plug-in the usb cable to the devkit and resetting that way.

So what's happening here?

[ESP_Sprite]

Okay, so first of all: the 'random' number comes from the RTC SRAM being powered off for a while. This means that the charge in the memory cells deteriorate, and reading them out gives some random-ish value.

While resetting the chip with the EN line, this happens. This line actually does two things: when it's low, it cuts power to most of the ESP32 peripherals, including memory; when it goes from low to high, it restores power and also resets the most important bits of the ESP32 to a known state (the actual 'reset'). Hence the 'POWERON' reason: lowering and raising EN is indistinguishable from a powerdown and powerup.

An USB-serial-JTAG reset is an actual reset, as in, it does not cut power. As such, memory keeps its state and you'll see the same value as you wrote the previous time.