Panic when writing flash and UART interrupt - both IRAM_ATTR and DRAM_ATTR used

MikeMyhre
Posts: 54
Joined: Sat Nov 05, 2022 3:32 am

Panic when writing flash and UART interrupt - both IRAM_ATTR and DRAM_ATTR used

Postby MikeMyhre » Sun Jul 23, 2023 7:28 pm

I am getting a Guru Meditation Error: Core 0 panic'ed (Cache disabled but cached memory region accessed).
The core dump points to uart_clear_intr_status as the first line of the dump (uart.c:355).
I am using esp-idf-V4.4.3 and ESP32-s3-WROOM module.
I am writing to SPIFFS file system with an fopen when the problem happens.
If I disable the code that uses the module, no errors happen.
My Interrupt routine uses the IRAM_ATTR attribute and all data that is addressed in the IRQ has the function has the DRAM_ATTR on it.
The function that is calling the fopen function as well as the data block that it is writing also has these attributes.
I have seen others comment on the fact that uart functions seem to do this.
Could it be that uart_tx_chars() and uart_clear_intr_status() functions are not IRAM functions? It would seem that they would have to be.
I have reduced my interrupt code all the way down to these two functions sending a single character and ti still happens.
I also went into menuconfig and disabled the SPI_MASTER_ISR_IN_IRAM option.

Any ideas what could be wrong.
Thanks, Mike

MicroController
Posts: 1708
Joined: Mon Oct 17, 2022 7:38 pm
Location: Europe, Germany

Re: Panic when writing flash and UART interrupt - both IRAM_ATTR and DRAM_ATTR used

Postby MicroController » Sun Jul 23, 2023 10:25 pm

Check menuconfig > Component config > Driver config > UART > UART ISR in IRAM

MikeMyhre
Posts: 54
Joined: Sat Nov 05, 2022 3:32 am

Re: Panic when writing flash and UART interrupt - both IRAM_ATTR and DRAM_ATTR used

Postby MikeMyhre » Mon Jul 24, 2023 2:24 am

MicroController wrote:
Sun Jul 23, 2023 10:25 pm
Check menuconfig > Component config > Driver config > UART > UART ISR in IRAM
Thanks, but that didn't fix it. It still gives the Cache accessed while disabled message.

Mike

ESP_igrr
Posts: 2071
Joined: Tue Dec 01, 2015 8:37 am

Re: Panic when writing flash and UART interrupt - both IRAM_ATTR and DRAM_ATTR used

Postby ESP_igrr » Mon Jul 24, 2023 8:08 am

Hi Mike,

when the system panics, there should be a register dump and backtrace printed (see the docs for more information). IDF monitor will decode the addresses in the backtrace, converting them into function names and line numbers. You can use this information to find the function which is not in IRAM. In particular, look for the value of "PC" (program counter) and the function which the PC belongs to.

MikeMyhre
Posts: 54
Joined: Sat Nov 05, 2022 3:32 am

Re: Panic when writing flash and UART interrupt - both IRAM_ATTR and DRAM_ATTR used

Postby MikeMyhre » Mon Jul 24, 2023 5:04 pm

ESP_igrr wrote:
Mon Jul 24, 2023 8:08 am
Hi Mike,

when the system panics, there should be a register dump and backtrace printed (see the docs for more information). IDF monitor will decode the addresses in the backtrace, converting them into function names and line numbers. You can use this information to find the function which is not in IRAM. In particular, look for the value of "PC" (program counter) and the function which the PC belongs to.
The function is uart_clear_intr_status which is in my isr function (with an IRAM_ATTR attribute).

Code: Select all

I (8803) SetMenu: Setting menu with line1: Configuration
Guru Meditation Error: Core  0 panic'ed (Cache disabled but cached memory region accessed).


Core  0 register dump:
PC      : 0x42020ade  PS      : 0x00060034  A0      : 0x40376f2c  A1      : 0x3fc991a0
0x42020ade: uart_clear_intr_status at C:/Espressif/frameworks/esp-idf-v4.4.3/components/driver/uart.c:355

0x40376f2c: _xt_medint2 at C:/Espressif/frameworks/esp-idf-v4.4.3/components/freertos/port/xtensa/xtensa_vectors.S:1200

A2      : 0x00000000  A3      : 0x3fca84d4  A4      : 0x00040000  A5      : 0x4037e072
0x4037e072: _frxt_int_enter at C:/Espressif/frameworks/esp-idf-v4.4.3/components/freertos/port/xtensa/portasm.S:119

A6      : 0xe0000000  A7      : 0x00000000  A8      : 0x8037784c  A9      : 0x3fc9b038
A10     : 0x00000001  A11     : 0x00000001  A12     : 0x80378b25  A13     : 0x3fca82c0
A14     : 0x00000000  A15     : 0x3fc9eb34  SAR     : 0x0000001f  EXCCAUSE: 0x00000007
EXCVADDR: 0x00000000  LBEG    : 0x400570e8  LEND    : 0x400570f3  LCOUNT  : 0x00000000


Backtrace: 0x42020adb:0x3fc991a0 0x40376f29:0x3fc991c0 0x40382b1b:0x3fca82a0 0x403826ce:0x3fca82c0 0x403871cd:0x3fca82f0 0x403796ef:0x3fca8370 0x420236a1:0x3fca83b0 0x42011783:0x3fca83e0 0x42015463:0x3fca8410 0x42012ff7:0x3fca8440 0x42013389:0x3fca8480 0x420133d3:0x3fca84b0 0x42013706:0x3fca84d0 0x42013bea:0x3fca8510 0x42014ce2:0x3fca8560 0x42011f1e:0x3fca85c0 0x42011337:0x3fca85f0 0x420048d1:0x3fca8610 0x4207bc5e:0x3fca8630 0x4207bd01:0x3fca8660 0x40377478:0x3fca8680 0x4200b297:0x3fca86a0 0x4200b369:0x3fca86c0 0x403813f5:0x3fca86e0
0x42020adb: uart_set_line_inverse at ??:?

0x40376f29: _xt_medint2 at C:/Espressif/frameworks/esp-idf-v4.4.3/components/freertos/port/xtensa/xtensa_vectors.S:1200

0x40382b1b: spimem_flash_ll_cmd_is_done at C:/Espressif/frameworks/esp-idf-v4.4.3/components/hal/esp32s3/include/hal/spimem_flash_ll.h:75 (discriminator 1)
 (inlined by) spi_flash_hal_poll_cmd_done at C:/Espressif/frameworks/esp-idf-v4.4.3/components/hal/spi_flash_hal_common.inc:38 (discriminator 1)

0x403826ce: spi_flash_hal_read at C:/Espressif/frameworks/esp-idf-v4.4.3/components/hal/spi_flash_hal_common.inc:174

0x403871cd: spi_flash_chip_generic_read at C:/Espressif/frameworks/esp-idf-v4.4.3/components/spi_flash/spi_flash_chip_generic.c:218

0x403796ef: esp_flash_read at C:/Espressif/frameworks/esp-idf-v4.4.3/components/spi_flash/esp_flash_api.c:832 (discriminator 4)

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