What I'd like to see in a future riscv chip.

[BlueCoder]

Multiple cores that you can turn on and off; preferably at least 4. Plus one very low power core. Maybe a multi chip design with a separate radio chip and custom bus interface. Not that you couldn't package it all into one but it would allow more configuration options.

[ESP_Sprite]

Perhaps the ESP32-P4 comes close to what you're looking for (once it's in stores)? It's got two high-performance cores (which in total are probably as fast as or faster than four of our current RiscV cores) and a low-power core. You can connect e.g. an ESP32C3 to it for the radios.

[DrMickeyLauer]

I'm pretty happy with the C6 as is, although I'd really like to have a) more RAM [especially when you're using BLE and WiFi and TWAI together plus a protocol with compressed payloads, it gets very tight] and b) TWAI/FD .

[DrMickeyLauer]

You can connect e.g. an ESP32C3 to it for the radios.

What kind of connection do you envision for such a hybrid?

[ESP_Sprite]

Probably either SPI or SDIO. Check e.g. here; a solution would likely use that.