which new "esp" 8 pin ic is this on the new esp32 modul? ;-)

[rudi ;-)]

but I can post the schematic.

This pic doesn't show gpio12 pullup resistor

i think this is not so important as long as it illustrate, and answered the question

... how to connect PSRAM and Flash.

i wounder, is this now the shematic for wrover or realy only a illustrate ( i am going saver steps now since clk sharing )

and cause i think over for what we need a wire bridge provide for
SCK/CLK to GPIO17,
i see the Resistor R11 is NC but for what we need this smd pad provide?
it is clear now [**1] [**2] , that we do not can share the flash CLK with the SRAM CLK.

btw the illustrate for GPIO12 is as an optional -
but i think, like WiFive, too, - we need this official in the shematic
and as a very important point in the initial use in the Wrover Getting Start Guide
it is official that wrover use 1.8V Flash and pSRAM - so we need the point to the customer who do this not know.
it is a very important first step point to WROVER / WROVER Kit

wrover-schem_bootstrap.png (104.02 KiB) Viewed 13453 times

note to green mark: read the datasheet, cause flash and pSRAM is 1.8 V in Wrover - it need bootstrap pin pulled up (R custom) or eFuse for VDD_SDIO i.8V

It is recommended to use the bootstrap, See note in the datasheet(coming soon) or reference in the link



[**1] note1 to CLK Sharing Flash/pSRAM
[**2] note2 to CLK Sharing Flash/pSRAM

[WiFive]

i think this is not so important as long as it illustrate, and answered the question

It is important because the pullup resistor is on the module

[rudi ;-)]

i think this is not so important as long as it illustrate, and answered the question

It is important because the pullup resistor is on the module

wuupps.. ..why then switch my modul not to 1.8 :/.... where is my glasses better magnifying glasses..
can u point me please?

sales_wrover_may_2017.jpg (168.95 KiB) Viewed 13446 times

[rudi ;-)]

you mean R0?

wupps...png (194.26 KiB) Viewed 13446 times

( too late now here 4:00 AM will look deeper on day )


@jeroen
do you forget to cpy pst a part of shematic ?

( i wounder wy my modul not switch to 1.8 - can be thats difference - i must open lid on day on the connected modul and have to test )


must check here GPIO12

wrover_.jpg (150.79 KiB) Viewed 13426 times

[WiFive]

you mean R0?

Actually R9 but yes that one

[rudi ;-)]

you mean R0?

Actually R9 but yes that one

only for the protocol where you read "9" on the picture ( do you have the espressif shematic ? ) ok i will check today

btw:
there are more wrover "variants" in the spot WiFive -
i check here what variants i have - perhabs this - what i have connected - "can be" there is a difference to the "R9" version.

have a look - there is Wrover with IPX ( u.FL ) ( extern ANT ) and without - (intern ANT ) ( rev1 ? )

and wrover kit itself now with new camera connector and new design ( SD Card pin SD_02 not more )
edit : changed 1MB PNG -> 0.3 MB JPEG

wrover_kit_spot.jpg (285.3 KiB) Viewed 13429 times

[analoglamb]

Rudi: The pages you mention are MMU pages; they're inherent to the way the ESP32 maps the external RAM into main memory and not a property of the RAM chip itself. Also, the routines to do SPI memory copies seemingly slipped through the review process: the code needs to be cleaned up, if anything. Feel free to use it if you want but please do not assume the API is stable; we may change it when we get around to properly reviewing it.


AnalogLamb: The Wrover datasheet isn't public yet (because officially the wrover isn't a product we have announced as for sale yet, from what I can infer) but I can post the schematic. If you need more info, please contact Espressif privately.

Thanks. Great!

[rudi ;-)]

IMG_7537.JPG (929.69 KiB) Viewed 13269 times

does psram 1.8 only work if flash is a specific flash and 1.8 too and VD_SDIO domain must set to 1.8 ?

i tried many things - many firmwares - many flashes - many hour's many days and now 2 weeks!
my hope was now TXB0108

DevKitC , 3.3V Flash
compile, SPI mode DIO
compile, SPI mode QIO

same with ESP32-Nano32-Gravitech, 3.3V Flash
compile, SPI mode DIO
compile, SPI mode QIO

LevelShifter 8bit bidirectional TXB0108

txb0108.pdf

(1.3 MiB) Downloaded 741 times

all lines
-SD0
-SD1
-SD2
-SD3
-SCLK
-/CE

/CE pulled up 1.8 V like shematic from WROVER you posted.
VDD 1.8 V

What interna secret do we know yet?
Which Bit is set / or not set in?
Why we get no Informations on the right way to support PSRAM with ESP32-D0WDQ6 like Wrover Shematic with right R9 pulled up for 1.8V VDD_SDIO Domain?
Why is there this Shematic again wrong posted here?
And why comes no editition of this or statement?
Why is there no Info that this postet Shematic is VDD_SDIO 3.3 V?

wrover-schem.png (100.08 KiB) Viewed 13265 times

Why is there no Info that this postet Shematic was wrong postet and there is R9




missed in the Shematic?

This posted Shematic is wrong and do not match to the existings Wrover on Wrover Kit and FCC Test



Why you block us to go on with ESP32-D0WDQ6 and PSRAM
- to build Modules
- to build Firmware
- to go on ?

I now expect a clear, objective answer
Among others
- real Wrover Shematic
- Statement 3.3 / 1.8 Flash

[rudi ;-)]

-. I will take a long break - -

it can not go on like this.

It is a pity when I have to close the subject.

But lately it was pure wasted time.

[ESP_Sprite]

I'm not quite convinced of that level shifter... at 1.8V, it has a throughput of 60MBPS, which is less than the 80MHz and dangerously close to the 40MHz the ESP32 can use as clock speeds, Also, I'm not entirely sure if the auto-direction-switching is enough for the way we use SPI.

Official answer: Get one of our devkits or modules that have integrated PSRAM, we can guarantee the hardware qualifications of those.
Unofficial answer (more like a suggestion; nothing guaranteed): The way we experimented with PSRAM before the modules with them on it were ready is to take a devkit, remove the 3.3V flash and replace it with 1.8V flash, then solder the PSRAM chip on top of it, deadbug style, with the CLK and CS pins floating and the rest connected to the flash chip; we use the fact that the psram chip has the same pinout as a normal flash chip. We then used thin wiring to wire the CS and CLK pins up, made sure to wire up the bootstrap pin was set in such a way that VDD_SIO is 1.8V (and the flash is connected to VDD_SIO), and that was enough to make it work; no level converters needed.