Hello again everyone!
I have inspected the SDIO using a digital oscilloscope, and well it seems OK for D0 to D3 signals, at least in terms of shape (squared signals between 0 to 3.3V). I could not get anything regarding the clock signal: does anyone know what is supposed to be as a shape & frequency? I could find nothing regarding SDIO clock signal on the web. Should it be a 20 MHz squared curve?
I also checked the SD card reader I am using (this Adafruit one) and realized that it has pullup resistors in place, at 47 kOhms.
I did some trials again today, and my setting works in 4 bits when I set an additional 10 kOhms pullup on the "CLK" pin.
Is it possible that 47 kOhms is too much and that the most sensitive would be the CLK, thus solving my problem by lowering it down to 10 kOhms?
ESP32 and SDMMC working only in 1 bit
Re: ESP32 and SDMMC working only in 1 bit
Hi again everyone!
I continued to think about my issue and made some searches about the value that pullup resistor should have.
Please look at this approach and correct me if something is wrong here:
One thing to consider is to make sure that, given a R value for pullup, the input current value in ESP32 specs keep the voltage drop due to pullup resistor above the level considered as high level by the ESP32. Looking at WROVER datasheet (page 12), I have:
Second thing to consider is to compute the rise time, due to pin capacitance, which forms a RC filter with the pullup one. Typical rise time is going to be 3 time RC filter time constant (R x C), and this time should be shorter than the period of the SDIO clock (20 MHz = 50 ns), which means that R should be lower than 50 ns / (3 x Pin capacitance). Pin capacitance is said to be 2 pF, so this gives: R < 8.3 kOhm
So as a theoretical result pullup should be lower than the 10 kOhm resistors that I am currently using to accommodate with the SDIO clock.
What do you think of these 2 computations?
Thanks!
I continued to think about my issue and made some searches about the value that pullup resistor should have.
Please look at this approach and correct me if something is wrong here:
One thing to consider is to make sure that, given a R value for pullup, the input current value in ESP32 specs keep the voltage drop due to pullup resistor above the level considered as high level by the ESP32. Looking at WROVER datasheet (page 12), I have:
- 0.75 x Vdd as limit for high level => max 0.25 x Vdd drop
- 50 nA as max input current
Second thing to consider is to compute the rise time, due to pin capacitance, which forms a RC filter with the pullup one. Typical rise time is going to be 3 time RC filter time constant (R x C), and this time should be shorter than the period of the SDIO clock (20 MHz = 50 ns), which means that R should be lower than 50 ns / (3 x Pin capacitance). Pin capacitance is said to be 2 pF, so this gives: R < 8.3 kOhm
So as a theoretical result pullup should be lower than the 10 kOhm resistors that I am currently using to accommodate with the SDIO clock.
What do you think of these 2 computations?
Thanks!
Re: ESP32 and SDMMC working only in 1 bit
Hello all! I tried with 5 kOhms pullup and I have SD card working in MMC in 4 bits and 20 MHz freq! Seems like the pullup value was the issue ...
Cheers!
Cheers!
Who is online
Users browsing this forum: No registered users and 34 guests