I am running a 7-inch RGB Display with this IDF example --> (https://github.com/espressif/esp-idf/tr ... /rgb_panel)
Its a 18 / 24 bit RGB Display. But its being run with 16 Bit.
Its working well, Except that the image is slightly skewed.
All circles are egg-shaped when they should be perfectly round.
Its difficult to show, but here are some images.
Perhaps it has something to do with the LCD timings? I tried changing them in many ways to no avail.
Currently my LCD is created with these timings:
Code: Select all
esp_lcd_rgb_panel_config_t panel_config = {
.data_width = 16, // RGB565 in parallel mode, thus 16bit in width
.bits_per_pixel = 16,
.psram_trans_align = 64,
.clk_src = LCD_CLK_SRC_DEFAULT,
.disp_gpio_num = EXAMPLE_PIN_NUM_DISP_EN,
.pclk_gpio_num = EXAMPLE_PIN_NUM_PCLK,
.vsync_gpio_num = EXAMPLE_PIN_NUM_VSYNC,
.hsync_gpio_num = EXAMPLE_PIN_NUM_HSYNC,
.de_gpio_num = EXAMPLE_PIN_NUM_DE,
.data_gpio_nums = {
EXAMPLE_PIN_NUM_DATA0,
(...)
EXAMPLE_PIN_NUM_DATA15,
},
.timings = {
.pclk_hz = EXAMPLE_LCD_PIXEL_CLOCK_HZ, //(18 * 1000 * 1000)
.h_res = EXAMPLE_LCD_H_RES, //800
.v_res = EXAMPLE_LCD_V_RES, //480
// The following parameters should refer to LCD spec
.hsync_back_porch = 46,
.hsync_front_porch = 210,
.hsync_pulse_width = 1,
.vsync_back_porch = 23,
.vsync_front_porch = 147,
.vsync_pulse_width = 1,
.flags.pclk_active_neg = true,
},
.flags.fb_in_psram = true, // allocate frame buffer in PSRAM