Need to disable TG1WDT_SYS_RESET

[EnthusiastGuy]

Hi there!

I am using an ESP32-D0WDQ6-V3 (revision 3) to do some very low level exploration on the board's instruction set, memory layout and other stuff. This is done for a specifically clear purpose to which this system might be an excellent candidate for.

Part of that process consists of hand-brewing some assembly instructions, placing them in memory somewhere and then pointing the PC to that to run them. This is done from within the microcontroller itself, not external toolchain, except the initial code which is written in C and acts as a form of boot sequence.
Unfortunately, the timer watch dog is in my way. I read about it, I understand its purpose, but where I'm at, I don't need it. I want the actual panic trace instead of resetting so I can look at the register and draw some conclusions.

What I tried so far were various combinations of this:

Code: Select all

  rtc_wdt_protect_off(); 
  rtc_wdt_disable();
  disableCore0WDT();
  disableLoopWDT();
  esp_task_wdt_delete(NULL);

I also read the technical Xtensa ISA (I need that for the asm opcodes anyway), the esp datasheet and this forum and I've got no closer to getting this out of my way.


How can I disable it and other similar mechanisms that would force a reset instead of panic?


Thanks!

[ESP_Sprite]

If you're using esp-idf, you can disable the watchdogs in menuconfig.

[EnthusiastGuy]

Hey there, thanks for your reply!

If you're using esp-idf, you can disable the watchdogs in menuconfig.

I wasn't. I am now, found it along with quite a lot of other interesting options such as disabling protection for unmapped memory regions, thanks a lot for this!

ESP-IDF_bootloader_config.png (37.55 KiB) Viewed 2519 times

Will dive in the documentation and figure things out.

Cheers!