operations in different cores influence each other if 1 of those writes to memory

yonip94
Posts: 15
Joined: Mon Jul 11, 2022 12:42 pm

operations in different cores influence each other if 1 of those writes to memory

Postby yonip94 » Mon Jul 18, 2022 4:32 pm

Hello guys!
My name is Yoni and i am using ESP32 DevKitc MCU, esp.idf, Linux environment .
First thanks a lot for your products and this forum.

I would like to explain you my issue and than ask several questions, ill be happy if someone can help or give me some clues to solve this.
so, i use in my project this 8MByte custom partition table i created:
# Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
# Name, Type, SubType, Offset, Size, Flags
phy_init, data, phy, 0x9000, 1M,
factory, app, factory, 0x110000, 1M,
nvs_calib, data, nvs, 0x220000, 1M,
nvs_packet, data, fat, 0x330000, 4M,

I have 2 general processes that should run in parallel:
Process 1 - every x[ms] , should sample sensors and do some stuffs (this process pinned to core 1)
Process 2 - every n*x[ms] |n>1,n is int. write packet to fat nvs_packet partition (this process pinned to core 0)
Packet is 1KByte, and after every 4KByte of writes (sector) - before writing the current packet, i erase the next sector.

As i see, every time process 1 is performed and process 2 is not perform i get good results about timing of process 1 - x[ms] robast.
But when erasing or writing data in process 2 (core 0) the operations of process 1 (core 1) getting slower a lot than what should be, therefore i see big exceed of x[ms].

So my questions are:
1 - I wonder why should the processes disturb each other as those are pinned to different cores? why any relation between the cores seems to be occurred?
2 - Is it possible to use DMA + writing/reading/erasing memory? (on fat subtype - huge data should be involved in the project)
3 - If the answer of question 2 is yes - what functions excactly can help ?
* some information about it can help as well.
4 - If the answer of question 2 is no - can you suggest some other ideas/ways to solve the issue i described above?

Thanks a lot
Yoni

ESP_Sprite
Posts: 9766
Joined: Thu Nov 26, 2015 4:08 am

Re: operations in different cores influence each other if 1 of those writes to memory

Postby ESP_Sprite » Tue Jul 19, 2022 1:17 am

Your code executes (via a cache) directly from flash for the most part - as flash is unavailable during writes/erases, we need to suspend most of the tasks. Depending on what your code looks like, you may be able to place everything (the task + everything it calls) into IRAM and give the task the highest priority - that allows it to run even when flash goes away.

Easiest workaround may be to add external flash to one of the SPI ports - with a recent ESP-IDF, you can still use FAT on that and it won't affect code execution.

yonip94
Posts: 15
Joined: Mon Jul 11, 2022 12:42 pm

Re: operations in different cores influence each other if 1 of those writes to memory

Postby yonip94 » Tue Jul 19, 2022 7:11 pm

ESP_Sprite, many thanks to you!
it is really helpful and i will use your advices :)

yonip94
Posts: 15
Joined: Mon Jul 11, 2022 12:42 pm

Re: operations in different cores influence each other if 1 of those writes to memory

Postby yonip94 » Wed Aug 03, 2022 12:39 pm

Unfortunately we cannot use external flash to solve easily the problem cause lack of space, so i tried the other suggest,
but still not works, am i miss something?

I prepared new code that uses 1 task per each core.
core 0, (in flash), cache ENABLE for this core - erase sector every 1ms + set gpio 14 before erase operation, reset it after erase operation.
core 1, (in iram), cache DISABLE for this core - every 1000 "for loop ticks" - toggling gpio 15, using direct register writes.

Results (tested with scope):
While erasing operation on core 0 is performed -> gpio 15 is not toggling from core 1 operation (seems that task still suspend after cache disable for the core1+putting the core1 code part in iram excactly as you suggest to do).

Here my for loop codes:
* the sign "----" = line codes tabs.

core 0 main loop:
----for (;;)
----{
--------gpio_set_level(14, 1);
--------esp_partition_erase_range(partition,((size_t)(0)),4096);
--------gpio_set_level(14, 0);
--------vTaskDelay(1);
----}

core 1 .c file:
#include "iram_only.h"
#include "inttypes.h"
#include <stddef.h>
#include "/home/yoni/esp_idf_v4_4_1/components/spi_flash/cache_utils.h"

static DRAM_ATTR uint32_t x;

void IRAM_ATTR gpio_toggle(void)
{
----for (;;)
----{
---------if((((*(uint32_t*)0x3FF44004)>>15)&0x00000001)==0x00000000)//if gpio 15 is low
---------{
------------ (*(uint32_t*)0x3FF44004)=( ( (*(uint32_t*)0x3FF44004) ) |(1<<15) ); //gpio_set_level(15, 1);
---------}

---------else//if gpio 15 is high
--------{
------------ (*(uint32_t*)0x3FF44004)=((*(uint32_t*)0x3FF44004) & (~(1<<15)) ); //gpio_set_level(15, 0);
--------}
-------- for(x=0;x<1000;x++);//waits 1000 ticks
----}
}

Are my codes looks ok to work together? maybe its another menuconfig settings i should change?
Really thanks!
Yoni

ESP_Sprite
Posts: 9766
Joined: Thu Nov 26, 2015 4:08 am

Re: operations in different cores influence each other if 1 of those writes to memory

Postby ESP_Sprite » Thu Aug 04, 2022 1:02 am

How are you starting that gpio_toggle task? Its priority defines if it's gonna run when flash is in use.

yonip94
Posts: 15
Joined: Mon Jul 11, 2022 12:42 pm

Re: operations in different cores influence each other if 1 of those writes to memory

Postby yonip94 » Thu Aug 04, 2022 6:31 am

Hey again ESP_sprite very very thanks for your replying to me!

so from main.c i call this function, to start task of toggling the gpio:

void gpio_toggle_task_start(void)
{
----TaskHandle_t task_handle_io;
----xTaskCreatePinnedToCore(
--------------------------------------------gpio_toggle,///////////////////////////Task function name
--------------------------------------------"gpio_check_task",////////////////name of task
--------------------------------------------4096,/////////////////////////////////////Stack size of task
--------------------------------------------NULL,////////////////////////////////////parameter of the task
--------------------------------------------25,/////////////////////////////////////////priority of the task
--------------------------------------------&task_handle_io,//////////////////Task handle to keep track of created task
--------------------------------------------1); /////////////////////////////////////////pin task to core 1
}

As you said - i gave this task the highest priority, in this way i gave the erase sector the lowest possible priority (1)
also i tried to switch between those 2 tasks priorities but nothing seems to help it.

is it ok? or am i still missing something?
Thanks a lot for your interest!!!
Yoni

ESP_Sprite
Posts: 9766
Joined: Thu Nov 26, 2015 4:08 am

Re: operations in different cores influence each other if 1 of those writes to memory

Postby ESP_Sprite » Thu Aug 04, 2022 8:50 am

And just to double-check, the writing task is on the other core?

yonip94
Posts: 15
Joined: Mon Jul 11, 2022 12:42 pm

Re: operations in different cores influence each other if 1 of those writes to memory

Postby yonip94 » Thu Aug 04, 2022 1:14 pm

Hey, yes - please have a look on the NVS task

esp_err_t NVS_task_start(void)
{
----if (pdPASS != xTaskCreatePinnedToCore(
------------------------------------------------------------nvs_task_L,///////////////////////////Task function
------------------------------------------------------------"nvs_task",////////////////////////////name of task
------------------------------------------------------------4096,/////////////////////////////////////Stack size of task
------------------------------------------------------------NULL,///////////////////////////////////parameter of the task
------------------------------------------------------------1,//////////////////////////////////////////priority of the task
------------------------------------------------------------&task_handle,//////////////////////Task handle to keep track of created task
------------------------------------------------------------0)) ///////////////////////////////////////pin task to core 0
----{
--------ESP_LOGE(TAG_NVS, "ERROR: CREATE NVS TASK FAILED");
--------return (ESP_FAIL);
----}
----return (ESP_OK);
}

I really dont get why its not working - everything in this way is very logic to me.
what am i missing?
Any idea? maybe some menuconfig settings?
Thanks a lot!
Yoni

ESP_Sprite
Posts: 9766
Joined: Thu Nov 26, 2015 4:08 am

Re: operations in different cores influence each other if 1 of those writes to memory

Postby ESP_Sprite » Fri Aug 05, 2022 12:57 am

Can you post the entirety of your code, in a zip or something? It's a bit hard to get a coherent view (or try running it ourselves) if there's only snippets.

yonip94
Posts: 15
Joined: Mon Jul 11, 2022 12:42 pm

Re: operations in different cores influence each other if 1 of those writes to memory

Postby yonip94 » Fri Aug 05, 2022 7:00 am

Thanks, ill ask my boss in sunday, and update.
Good weekend,
Yoni

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