ESP32 Forum

For the configuration of I2S0 peripheral clock output: When PIN_CTRL[3:0] = 0x0, select and
output module clock on the CLK_OUT1 in the IO_MUX Pad Summary;
When PIN_CTRL[3:0] = 0x0 and PIN_CTRL[7:4] = 0x0, select and output module clock on the
CLK_OUT2 in the IO_MUX Pad Summary;
When PIN_CTRL[3:0] = 0x0 and PIN_CTRL[11:8] = 0x0; select and output module clock on the
CLK_OUT3 in the IO_MUX Pad Summary.
For the configuration of I2S1 peripheral clock output: When PIN_CTRL[3:0] = 0xF, select and
output module clock on CLK_OUT1-3. (R/W)

This is confusing.

WiFive wrote:

For the configuration of I2S0 peripheral clock output: When PIN_CTRL[3:0] = 0x0, select and
output module clock on the CLK_OUT1 in the IO_MUX Pad Summary;
When PIN_CTRL[3:0] = 0x0 and PIN_CTRL[7:4] = 0x0, select and output module clock on the
CLK_OUT2 in the IO_MUX Pad Summary;
When PIN_CTRL[3:0] = 0x0 and PIN_CTRL[11:8] = 0x0; select and output module clock on the
CLK_OUT3 in the IO_MUX Pad Summary.
For the configuration of I2S1 peripheral clock output: When PIN_CTRL[3:0] = 0xF, select and
output module clock on CLK_OUT1-3. (R/W)

This is confusing.

if you read between the lines:
( without warranty )

For the configuration of I2S0 peripheral clock output:

When PIN_CTRL[3:0] = 0x0
select and output module clock on the CLK_OUT1 in the IO_MUX Pad Summary;
means output clock: CLK_OUT1

When PIN_CTRL[3:0] = 0x0 and PIN_CTRL[7:4] = 0x0
select and output module clock on the CLK_OUT2 in the IO_MUX Pad Summary;
means output clock: CLK_OUT2

When PIN_CTRL[3:0] = 0x0 and PIN_CTRL[11:8] = 0x0
select and output module clock on the CLK_OUT3 in the IO_MUX Pad Summary.
means output clock: CLK_OUT3


For the configuration of I2S1 peripheral clock output:

When PIN_CTRL[3:0] = 0xF
select and output module clock on CLK_OUT1-3. (R/W)
means output clock: CLK_OUT1 CLK_OUT2 CLK_OUT3

one thing is not clear: (R/W)
means perhabs we can read ( check ) and write ( set ) on the register

But to search for a logical connection in register pins would be futile

I'm not in the i2s at the moment, i am waiting for the pSRAM module then start i2s

best wishes
rudi

rudi ;-) wrote:
if you read between the lines:

Still confusing in color.

It sort of feels like getting the I2S peripheral clock out to feed the Master Clock input of an I2S DAC boils down to
and then you get the clock on GPIO0.

Sound right?

It will be few days before I can actually try it, but I thought I'd check-in on this thread.

Section has not been updated.

Here are settings that work (I used these to play 96kHz 24 bps stereo audio via a codec):
If you want to output clock for I2S0 to
CLK_OUT1, then set PIN_CTRL[3:0] = 0x0
CLK_OUT2, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[7:4] = 0x0
CLK_OUT3, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[11:8] = 0x0

If you want to output clock for I2S1 to
CLK_OUT1, then set PIN_CTRL[3:0] = 0xF
CLK_OUT2, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[7:4] = 0x0
CLK_OUT3, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[11:8] = 0x0

The rest of the bits are not documented, so should be treated as reserved.

Thanks, so bits that are not set to 0 should be set to 1? All 3 nybbles should be either 0 or F?

How do you output I2S0 clock on CLK_OUT1 and I2S1 clock on CLK_OUT2? Or you can only route one clock to gpio matrix?

The above got the clock. It is 40Mhz which is not quite what my DAC wants, but that is another story.

RoyceP wrote:

Code: Select all

PIN_FUNC_SELECT(PIN_CTRL, CLK_OUT1_S);

I dont think that is a proper call and maybe luck if it worked the way you wanted.

io_mux_reg.h, beginning at line 115, through at least line 131, suggest to me that the call is proper.