ESP32 Forum

Note 3: If you use the ESP32-C3-Lyra development board to run these routines, you need to apply $ADF_PATH/idf_patches/idf_v4.4_i2s_c3_pdm_tx.patch in the $IDF_PATH directory to obtain PDM support.

ESP-ROM:esp32c3-api1-20210207
Build:Feb 7 2021
rst:0x1 (POWERON),boot:0xd (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fcd5820,len:0x187c
load:0x403cc710,len:0xb34
load:0x403ce710,len:0x305c
entry 0x403cc710
I (30) boot: ESP-IDF v5.1.1-dirty 2nd stage bootloader
I (30) boot: compile time Sep 9 2023 21:32:07
I (30) boot: chip revision: v0.3
I (34) qio_mode: Enabling default flash chip QIO
I (39) boot.esp32c3: SPI Speed : 80MHz
I (44) boot.esp32c3: SPI Mode : QIO
I (48) boot.esp32c3: SPI Flash Size : 4MB
I (53) boot: Enabling RNG early entropy source...
I (59) boot: Partition Table:
I (62) boot: ## Label Usage Type ST Offset Length
I (70) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (77) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (84) boot: 2 factory factory app 00 00 00010000 00100000
I (92) boot: 3 storage Unknown data 01 82 00110000 00100000
I (99) boot: End of partition table
I (104) esp_image: segment 0: paddr=00010020 vaddr=3c040020 size=10c20h ( 68640) map
I (122) esp_image: segment 1: paddr=00020c48 vaddr=3fc8c000 size=01190h ( 4496) load
I (123) esp_image: segment 2: paddr=00021de0 vaddr=40380000 size=0be24h ( 48676) load
I (137) esp_image: segment 3: paddr=0002dc0c vaddr=00000000 size=0240ch ( 9228)
I (139) esp_image: segment 4: paddr=00030020 vaddr=42000020 size=33098h (209048) map
I (178) boot: Loaded app from partition at offset 0x10000
I (178) boot: Disabling RNG early entropy source...
I (190) cpu_start: Unicore app
I (190) cpu_start: Pro cpu up.
I (198) cpu_start: Pro cpu start user code
I (198) cpu_start: cpu freq: 160000000 Hz
I (198) cpu_start: Application information:
I (201) cpu_start: Project name: play_spiffs_mp3
I (207) cpu_start: App version: 1
I (211) cpu_start: Compile time: Sep 9 2023 21:17:49
I (217) cpu_start: ELF file SHA256: fa89c9b36a829078...
I (223) cpu_start: ESP-IDF: v5.1.1-dirty
I (229) cpu_start: Min chip rev: v0.3
I (234) cpu_start: Max chip rev: v0.99
I (238) cpu_start: Chip rev: v0.3
I (243) heap_init: Initializing. RAM available for dynamic allocation:
I (250) heap_init: At 3FC8E120 len 0004E5F0 (313 KiB): DRAM
I (257) heap_init: At 3FCDC710 len 00002950 (10 KiB): STACK/DRAM
I (263) heap_init: At 50000010 len 00001FD8 (7 KiB): RTCRAM
I (270) spi_flash: detected chip: gd
I (274) spi_flash: flash io: qio
W (278) spi_flash: Detected size(8192k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
W (291) i2s(legacy): legacy i2s driver is deprecated, please migrate to use driver/i2s_std.h, driver/i2s_pdm.h or driver/i2s_tdm.h
I (303) sleep: Configure to isolate all GPIO pins in sleep state
I (310) sleep: Enable automatic switching of GPIO sleep configuration
I (317) app_start: Starting scheduler on CPU0
I (322) main_task: Started on CPU0
I (322) main_task: Calling app_main()
I (322) SPIFFS_MP3_EXAMPLE: [ 1 ] Mount spiffs
I (352) SPIFFS_MP3_EXAMPLE: [ 2 ] Start codec chip
I (352) SPIFFS_MP3_EXAMPLE: [3.0] Create audio pipeline for playback
I (352) SPIFFS_MP3_EXAMPLE: [3.1] Create spiffs stream to read data from sdcard
I (362) SPIFFS_MP3_EXAMPLE: [3.2] Create i2s stream to write data to codec chip
I (372) SPIFFS_MP3_EXAMPLE: [3.2] esp32c3 lyra board v2
I (382) SPIFFS_MP3_EXAMPLE: [3.3] Create mp3 decoder to decode mp3 file
I (382) SPIFFS_MP3_EXAMPLE: [3.4] Register all elements to audio pipeline
I (392) SPIFFS_MP3_EXAMPLE: [3.5] Link it together [flash-->spiffs-->mp3_decoder-->i2s_stream-->[codec_chip
I (402) SPIFFS_MP3_EXAMPLE: [3.6] Set up uri (file as spiffs, mp3 as mp3 decoder, and default output is i2s)
I (412) SPIFFS_MP3_EXAMPLE: [ 4 ] Set up event listener
I (422) SPIFFS_MP3_EXAMPLE: [4.1] Listening event from all elements of pipeline
I (432) SPIFFS_MP3_EXAMPLE: [4.2] Listening event from peripherals
I (432) SPIFFS_MP3_EXAMPLE: [ 5 ] Start audio_pipeline
W (442) AUDIO_THREAD: Make sure selecte