ESP32-LyraTV4.3板子跑pipeline_opus_sdcard demo出错
Posted: Thu Sep 17, 2020 3:32 am
打印信息如下，请问各位这是什么原因。
ets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x1f (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6800
ho 0 tail 12 room 4
load:0x40078000,len:12072
ho 0 tail 12 room 4
load:0x40080400,len:6756
entry 0x4008077c
[0;32mI (76) boot: Chip Revision: 1[0m
[0;32mI (76) boot_comm: chip revision: 1, min. bootloader chip revision: 0[0m
[0;32mI (43) boot: ESP-IDF v3.3.2-dirty 2nd stage bootloader[0m
[0;32mI (43) boot: compile time 10:47:19[0m
[0;32mI (43) boot: Enabling RNG early entropy source...[0m
[0;32mI (48) boot: SPI Speed : 40MHz[0m
[0;32mI (53) boot: SPI Mode : DIO[0m
[0;32mI (57) boot: SPI Flash Size : 4MB[0m
[0;32mI (61) boot: Partition Table:[0m
[0;32mI (64) boot: ## Label Usage Type ST Offset Length[0m
[0;32mI (72) boot: 0 nvs WiFi data 01 02 00009000 00006000[0m
[0;32mI (79) boot: 1 phy_init RF data 01 01 0000f000 00001000[0m
[0;32mI (86) boot: 2 factory factory app 00 00 00010000 00100000[0m
[0;32mI (94) boot: End of partition table[0m
[0;32mI (98) boot_comm: chip revision: 1, min. application chip revision: 0[0m
[0;32mI (105) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x499ac (301484) map[0m
[0;32mI (220) esp_image: segment 1: paddr=0x000599d4 vaddr=0x3ffb0000 size=0x021a4 ( 8612) load[0m
[0;32mI (224) esp_image: segment 2: paddr=0x0005bb80 vaddr=0x40080000 size=0x00400 ( 1024) load[0m
[0;32mI (227) esp_image: segment 3: paddr=0x0005bf88 vaddr=0x40080400 size=0x04088 ( 16520) load[0m
[0;32mI (243) esp_image: segment 4: paddr=0x00060018 vaddr=0x400d0018 size=0x4cd68 (314728) map[0m
[0;32mI (355) esp_image: segment 5: paddr=0x000acd88 vaddr=0x40084488 size=0x0cc84 ( 52356) load[0m
[0;32mI (387) boot: Loaded app from partition at offset 0x10000[0m
[0;32mI (387) boot: Disabling RNG early entropy source...[0m
[0;32mI (387) psram: This chip is ESP32-D0WD[0m
[0;32mI (393) spiram: Found 64MBit SPI RAM device[0m
[0;32mI (397) spiram: SPI RAM mode: flash 40m sram 40m[0m
[0;32mI (402) spiram: PSRAM initialized, cache is in low/high (2-core) mode.[0m
[0;32mI (409) cpu_start: Pro cpu up.[0m
[0;32mI (413) cpu_start: Application information:[0m
[0;32mI (418) cpu_start: Project name: record_opus[0m
[0;32mI (423) cpu_start: App version: v2.1-38-gdfc4e31-dirty[0m
[0;32mI (429) cpu_start: Compile time: Sep 17 2020 10:47:37[0m
[0;32mI (435) cpu_start: ELF file SHA256: 39777867dac6aa44...[0m
[0;32mI (441) cpu_start: ESP-IDF: v3.3.2-dirty[0m
[0;32mI (447) cpu_start: Starting app cpu, entry point is 0x400814b4[0m
[0;32mI (0) cpu_start: App cpu up.[0m
[0;32mI (1338) spiram: SPI SRAM memory test OK[0m
[0;32mI (1339) heap_init: Initializing. RAM available for dynamic allocation:[0m
[0;32mI (1339) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM[0m
[0;32mI (1345) heap_init: At 3FFB3430 len 0002CBD0 (178 KiB): DRAM[0m
[0;32mI (1351) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM[0m
[0;32mI (1358) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM[0m
[0;32mI (1364) heap_init: At 4009110C len 0000EEF4 (59 KiB): IRAM[0m
[0;32mI (1371) cpu_start: Pro cpu start user code[0m
[0;32mI (1375) spiram: Adding pool of 4096K of external SPI memory to heap allocator[0m
[0;32mI (54) cpu_start: Starting scheduler on PRO CPU.[0m
[0;32mI (0) cpu_start: Starting scheduler on APP CPU.[0m
[0;32mI (56) spiram: Reserving pool of 32K of internal memory for DMA/internal allocations[0m
[0;32mI (56) REC_OPUS_SDCARD: [ 1 ] Mount sdcard[0m
[0;32mI (566) REC_OPUS_SDCARD: [ 2 ] Start codec chip[0m
[0;31mE (566) gpio: gpio_install_isr_service(412): GPIO isr service already installed[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.0] Create audio pipeline for recording[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.1] Create fatfs stream to write data to sdcard[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.2] Create i2s stream to read audio data from codec chip[0m
[0;32mI (596) REC_OPUS_SDCARD: [3.3] Create opus encoder to encode opus format[0m
[0;32mI (606) REC_OPUS_SDCARD: [3.4] Register all elements to audio pipeline[0m
[0;32mI (606) REC_OPUS_SDCARD: [3.5] Link it together [codec_chip]-->i2s_stream-->opus_encoder-->fatfs_stream-->[sdcard][0m
[0;32mI (626) REC_OPUS_SDCARD: [3.6] Setup uri (file as fatfs_stream, opus as opus encoder)[0m
[0;32mI (626) REC_OPUS_SDCARD: [ 4 ] Setup event listener[0m
[0;32mI (636) REC_OPUS_SDCARD: [4.1] Listening event from pipeline[0m
[0;32mI (636) REC_OPUS_SDCARD: [4.2] Listening event from peripherals[0m
[0;32mI (646) REC_OPUS_SDCARD: [ 5 ] Start audio_pipeline[0m
[0;32mI (676) REC_OPUS_SDCARD: [ 6 ] Listen for all pipeline events, record for 10 Seconds[0m
Guru Meditation Error: Core 0 panic'ed (LoadStoreError). Exception was unhandled.
Core 0 register dump:
PC : 0x40101912 PS : 0x00060f30 A0 : 0x800feae2 A1 : 0x3f80d250
A2 : 0x4026ecec A3 : 0x3f80d264 A4 : 0x3f418018 A5 : 0x000001e0
A6 : 0x00000001 A7 : 0x00000004 A8 : 0x00395b3d A9 : 0x3f417ff4
A10 : 0x00000000 A11 : 0x037fc59c A12 : 0x0000385f A13 : 0x00003fbe
A14 : 0x001c2f73 A15 : 0x3f80ccb0 SAR : 0x00000007 EXCCAUSE: 0x00000003
EXCVADDR: 0x4026ecfa LBEG : 0x4008b458 LEND : 0x4008b463 LCOUNT : 0x00000000
ELF file SHA256: 39777867dac6aa443f93759467fc603518aa44ebce10cd11810552f4fcf1e381
Backtrace: 0x40101912:0x3f80d250
Rebooting...
ets Jun 8 2016 00:22:57
rst:0xc (SW_CPU_RESET),boot:0x1f (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6800
ho 0 tail 12 room 4
load:0x40078000,len:12072
ho 0 tail 12 room 4
load:0x40080400,len:6756
entry 0x4008077c
[0;32mI (76) boot: Chip Revision: 1[0m
[0;32mI (76) boot_comm: chip revision: 1, min. bootloader chip revision: 0[0m
[0;32mI (43) boot: ESP-IDF v3.3.2-dirty 2nd stage bootloader[0m
[0;32mI (43) boot: compile time 10:47:19[0m
[0;32mI (43) boot: Enabling RNG early entropy source...[0m
[0;32mI (48) boot: SPI Speed : 40MHz[0m
[0;32mI (53) boot: SPI Mode : DIO[0m
[0;32mI (57) boot: SPI Flash Size : 4MB[0m
[0;32mI (61) boot: Partition Table:[0m
[0;32mI (64) boot: ## Label Usage Type ST Offset Length[0m
[0;32mI (72) boot: 0 nvs WiFi data 01 02 00009000 00006000[0m
[0;32mI (79) boot: 1 phy_init RF data 01 01 0000f000 00001000[0m
[0;32mI (86) boot: 2 factory factory app 00 00 00010000 00100000[0m
[0;32mI (94) boot: End of partition table[0m
[0;32mI (98) boot_comm: chip revision: 1, min. application chip revision: 0[0m
[0;32mI (105) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x499ac (301484) map[0m
[0;32mI (220) esp_image: segment 1: paddr=0x000599d4 vaddr=0x3ffb0000 size=0x021a4 ( 8612) load[0m
[0;32mI (224) esp_image: segment 2: paddr=0x0005bb80 vaddr=0x40080000 size=0x00400 ( 1024) load[0m
[0;32mI (227) esp_image: segment 3: paddr=0x0005bf88 vaddr=0x40080400 size=0x04088 ( 16520) load[0m
[0;32mI (243) esp_image: segment 4: paddr=0x00060018 vaddr=0x400d0018 size=0x4cd68 (314728) map[0m
[0;32mI (355) esp_image: segment 5: paddr=0x000acd88 vaddr=0x40084488 size=0x0cc84 ( 52356) load[0m
[0;32mI (387) boot: Loaded app from partition at offset 0x10000[0m
[0;32mI (387) boot: Disabling RNG early entropy source...[0m
[0;32mI (387) psram: This chip is ESP32-D0WD[0m
[0;32mI (393) spiram: Found 64MBit SPI RAM device[0m
[0;32mI (397) spiram: SPI RAM mode: flash 40m sram 40m[0m
[0;32mI (402) spiram: PSRAM initialized, cache is in low/high (2-core) mode.[0m
[0;32mI (409) cpu_start: Pro cpu up.[0m
[0;32mI (413) cpu_start: Application information:[0m
[0;32mI (418) cpu_start: Project name: record_opus[0m
[0;32mI (423) cpu_start: App version: v2.1-38-gdfc4e31-dirty[0m
[0;32mI (429) cpu_start: Compile time: Sep 17 2020 10:47:37[0m
[0;32mI (435) cpu_start: ELF file SHA256: 39777867dac6aa44...[0m
[0;32mI (441) cpu_start: ESP-IDF: v3.3.2-dirty[0m
[0;32mI (447) cpu_start: Starting app cpu, entry point is 0x400814b4[0m
[0;32mI (432) cpu_start: App cpu up.[0m
[0;32mI (1338) spiram: SPI SRAM memory test OK[0m
[0;32mI (1339) heap_init: Initializing. RAM available for dynamic allocation:[0m
[0;32mI (1339) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM[0m
[0;32mI (1345) heap_init: At 3FFB3430 len 0002CBD0 (178 KiB): DRAM[0m
[0;32mI (1352) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM[0m
[0;32mI (1358) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM[0m
[0;32mI (1364) heap_init: At 4009110C len 0000EEF4 (59 KiB): IRAM[0m
[0;32mI (1371) cpu_start: Pro cpu start user code[0m
[0;32mI (1376) spiram: Adding pool of 4096K of external SPI memory to heap allocator[0m
[0;32mI (55) cpu_start: Starting scheduler on PRO CPU.[0m
[0;32mI (0) cpu_start: Starting scheduler on APP CPU.[0m
[0;32mI (56) spiram: Reserving pool of 32K of internal memory for DMA/internal allocations[0m
[0;32mI (56) REC_OPUS_SDCARD: [ 1 ] Mount sdcard[0m
[0;32mI (566) REC_OPUS_SDCARD: [ 2 ] Start codec chip[0m
[0;31mE (566) gpio: gpio_install_isr_service(412): GPIO isr service already installed[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.0] Create audio pipeline for recording[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.1] Create fatfs stream to write data to sdcard[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.2] Create i2s stream to read audio data from codec chip[0m
[0;32mI (596) REC_OPUS_SDCARD: [3.3] Create opus encoder to encode opus format[0m
[0;32mI (606) REC_OPUS_SDCARD: [3.4] Register all elements to audio pipeline[0m
[0;32mI (606) REC_OPUS_SDCARD: [3.5] Link it together [codec_chip]-->i2s_stream-->opus_encoder-->fatfs_stream-->[sdcard][0m
[0;32mI (626) REC_OPUS_SDCARD: [3.6] Setup uri (file as fatfs_stream, opus as opus encoder)[0m
[0;32mI (626) REC_OPUS_SDCARD: [ 4 ] Setup event listener[0m
[0;32mI (636) REC_OPUS_SDCARD: [4.1] Listening event from pipeline[0m
[0;32mI (636) REC_OPUS_SDCARD: [4.2] Listening event from peripherals[0m
[0;32mI (646) REC_OPUS_SDCARD: [ 5 ] Start audio_pipeline[0m
[0;32mI (676) REC_OPUS_SDCARD: [ 6 ] Listen for all pipeline events, record for 10 Seconds[0m
ets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x1f (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6800
ho 0 tail 12 room 4
load:0x40078000,len:12072
ho 0 tail 12 room 4
load:0x40080400,len:6756
entry 0x4008077c
[0;32mI (76) boot: Chip Revision: 1[0m
[0;32mI (76) boot_comm: chip revision: 1, min. bootloader chip revision: 0[0m
[0;32mI (43) boot: ESP-IDF v3.3.2-dirty 2nd stage bootloader[0m
[0;32mI (43) boot: compile time 10:47:19[0m
[0;32mI (43) boot: Enabling RNG early entropy source...[0m
[0;32mI (48) boot: SPI Speed : 40MHz[0m
[0;32mI (53) boot: SPI Mode : DIO[0m
[0;32mI (57) boot: SPI Flash Size : 4MB[0m
[0;32mI (61) boot: Partition Table:[0m
[0;32mI (64) boot: ## Label Usage Type ST Offset Length[0m
[0;32mI (72) boot: 0 nvs WiFi data 01 02 00009000 00006000[0m
[0;32mI (79) boot: 1 phy_init RF data 01 01 0000f000 00001000[0m
[0;32mI (86) boot: 2 factory factory app 00 00 00010000 00100000[0m
[0;32mI (94) boot: End of partition table[0m
[0;32mI (98) boot_comm: chip revision: 1, min. application chip revision: 0[0m
[0;32mI (105) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x499ac (301484) map[0m
[0;32mI (220) esp_image: segment 1: paddr=0x000599d4 vaddr=0x3ffb0000 size=0x021a4 ( 8612) load[0m
[0;32mI (224) esp_image: segment 2: paddr=0x0005bb80 vaddr=0x40080000 size=0x00400 ( 1024) load[0m
[0;32mI (227) esp_image: segment 3: paddr=0x0005bf88 vaddr=0x40080400 size=0x04088 ( 16520) load[0m
[0;32mI (243) esp_image: segment 4: paddr=0x00060018 vaddr=0x400d0018 size=0x4cd68 (314728) map[0m
[0;32mI (355) esp_image: segment 5: paddr=0x000acd88 vaddr=0x40084488 size=0x0cc84 ( 52356) load[0m
[0;32mI (387) boot: Loaded app from partition at offset 0x10000[0m
[0;32mI (387) boot: Disabling RNG early entropy source...[0m
[0;32mI (387) psram: This chip is ESP32-D0WD[0m
[0;32mI (393) spiram: Found 64MBit SPI RAM device[0m
[0;32mI (397) spiram: SPI RAM mode: flash 40m sram 40m[0m
[0;32mI (402) spiram: PSRAM initialized, cache is in low/high (2-core) mode.[0m
[0;32mI (409) cpu_start: Pro cpu up.[0m
[0;32mI (413) cpu_start: Application information:[0m
[0;32mI (418) cpu_start: Project name: record_opus[0m
[0;32mI (423) cpu_start: App version: v2.1-38-gdfc4e31-dirty[0m
[0;32mI (429) cpu_start: Compile time: Sep 17 2020 10:47:37[0m
[0;32mI (435) cpu_start: ELF file SHA256: 39777867dac6aa44...[0m
[0;32mI (441) cpu_start: ESP-IDF: v3.3.2-dirty[0m
[0;32mI (447) cpu_start: Starting app cpu, entry point is 0x400814b4[0m
[0;32mI (0) cpu_start: App cpu up.[0m
[0;32mI (1338) spiram: SPI SRAM memory test OK[0m
[0;32mI (1339) heap_init: Initializing. RAM available for dynamic allocation:[0m
[0;32mI (1339) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM[0m
[0;32mI (1345) heap_init: At 3FFB3430 len 0002CBD0 (178 KiB): DRAM[0m
[0;32mI (1351) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM[0m
[0;32mI (1358) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM[0m
[0;32mI (1364) heap_init: At 4009110C len 0000EEF4 (59 KiB): IRAM[0m
[0;32mI (1371) cpu_start: Pro cpu start user code[0m
[0;32mI (1375) spiram: Adding pool of 4096K of external SPI memory to heap allocator[0m
[0;32mI (54) cpu_start: Starting scheduler on PRO CPU.[0m
[0;32mI (0) cpu_start: Starting scheduler on APP CPU.[0m
[0;32mI (56) spiram: Reserving pool of 32K of internal memory for DMA/internal allocations[0m
[0;32mI (56) REC_OPUS_SDCARD: [ 1 ] Mount sdcard[0m
[0;32mI (566) REC_OPUS_SDCARD: [ 2 ] Start codec chip[0m
[0;31mE (566) gpio: gpio_install_isr_service(412): GPIO isr service already installed[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.0] Create audio pipeline for recording[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.1] Create fatfs stream to write data to sdcard[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.2] Create i2s stream to read audio data from codec chip[0m
[0;32mI (596) REC_OPUS_SDCARD: [3.3] Create opus encoder to encode opus format[0m
[0;32mI (606) REC_OPUS_SDCARD: [3.4] Register all elements to audio pipeline[0m
[0;32mI (606) REC_OPUS_SDCARD: [3.5] Link it together [codec_chip]-->i2s_stream-->opus_encoder-->fatfs_stream-->[sdcard][0m
[0;32mI (626) REC_OPUS_SDCARD: [3.6] Setup uri (file as fatfs_stream, opus as opus encoder)[0m
[0;32mI (626) REC_OPUS_SDCARD: [ 4 ] Setup event listener[0m
[0;32mI (636) REC_OPUS_SDCARD: [4.1] Listening event from pipeline[0m
[0;32mI (636) REC_OPUS_SDCARD: [4.2] Listening event from peripherals[0m
[0;32mI (646) REC_OPUS_SDCARD: [ 5 ] Start audio_pipeline[0m
[0;32mI (676) REC_OPUS_SDCARD: [ 6 ] Listen for all pipeline events, record for 10 Seconds[0m
Guru Meditation Error: Core 0 panic'ed (LoadStoreError). Exception was unhandled.
Core 0 register dump:
PC : 0x40101912 PS : 0x00060f30 A0 : 0x800feae2 A1 : 0x3f80d250
A2 : 0x4026ecec A3 : 0x3f80d264 A4 : 0x3f418018 A5 : 0x000001e0
A6 : 0x00000001 A7 : 0x00000004 A8 : 0x00395b3d A9 : 0x3f417ff4
A10 : 0x00000000 A11 : 0x037fc59c A12 : 0x0000385f A13 : 0x00003fbe
A14 : 0x001c2f73 A15 : 0x3f80ccb0 SAR : 0x00000007 EXCCAUSE: 0x00000003
EXCVADDR: 0x4026ecfa LBEG : 0x4008b458 LEND : 0x4008b463 LCOUNT : 0x00000000
ELF file SHA256: 39777867dac6aa443f93759467fc603518aa44ebce10cd11810552f4fcf1e381
Backtrace: 0x40101912:0x3f80d250
Rebooting...
ets Jun 8 2016 00:22:57
rst:0xc (SW_CPU_RESET),boot:0x1f (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6800
ho 0 tail 12 room 4
load:0x40078000,len:12072
ho 0 tail 12 room 4
load:0x40080400,len:6756
entry 0x4008077c
[0;32mI (76) boot: Chip Revision: 1[0m
[0;32mI (76) boot_comm: chip revision: 1, min. bootloader chip revision: 0[0m
[0;32mI (43) boot: ESP-IDF v3.3.2-dirty 2nd stage bootloader[0m
[0;32mI (43) boot: compile time 10:47:19[0m
[0;32mI (43) boot: Enabling RNG early entropy source...[0m
[0;32mI (48) boot: SPI Speed : 40MHz[0m
[0;32mI (53) boot: SPI Mode : DIO[0m
[0;32mI (57) boot: SPI Flash Size : 4MB[0m
[0;32mI (61) boot: Partition Table:[0m
[0;32mI (64) boot: ## Label Usage Type ST Offset Length[0m
[0;32mI (72) boot: 0 nvs WiFi data 01 02 00009000 00006000[0m
[0;32mI (79) boot: 1 phy_init RF data 01 01 0000f000 00001000[0m
[0;32mI (86) boot: 2 factory factory app 00 00 00010000 00100000[0m
[0;32mI (94) boot: End of partition table[0m
[0;32mI (98) boot_comm: chip revision: 1, min. application chip revision: 0[0m
[0;32mI (105) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x499ac (301484) map[0m
[0;32mI (220) esp_image: segment 1: paddr=0x000599d4 vaddr=0x3ffb0000 size=0x021a4 ( 8612) load[0m
[0;32mI (224) esp_image: segment 2: paddr=0x0005bb80 vaddr=0x40080000 size=0x00400 ( 1024) load[0m
[0;32mI (227) esp_image: segment 3: paddr=0x0005bf88 vaddr=0x40080400 size=0x04088 ( 16520) load[0m
[0;32mI (243) esp_image: segment 4: paddr=0x00060018 vaddr=0x400d0018 size=0x4cd68 (314728) map[0m
[0;32mI (355) esp_image: segment 5: paddr=0x000acd88 vaddr=0x40084488 size=0x0cc84 ( 52356) load[0m
[0;32mI (387) boot: Loaded app from partition at offset 0x10000[0m
[0;32mI (387) boot: Disabling RNG early entropy source...[0m
[0;32mI (387) psram: This chip is ESP32-D0WD[0m
[0;32mI (393) spiram: Found 64MBit SPI RAM device[0m
[0;32mI (397) spiram: SPI RAM mode: flash 40m sram 40m[0m
[0;32mI (402) spiram: PSRAM initialized, cache is in low/high (2-core) mode.[0m
[0;32mI (409) cpu_start: Pro cpu up.[0m
[0;32mI (413) cpu_start: Application information:[0m
[0;32mI (418) cpu_start: Project name: record_opus[0m
[0;32mI (423) cpu_start: App version: v2.1-38-gdfc4e31-dirty[0m
[0;32mI (429) cpu_start: Compile time: Sep 17 2020 10:47:37[0m
[0;32mI (435) cpu_start: ELF file SHA256: 39777867dac6aa44...[0m
[0;32mI (441) cpu_start: ESP-IDF: v3.3.2-dirty[0m
[0;32mI (447) cpu_start: Starting app cpu, entry point is 0x400814b4[0m
[0;32mI (432) cpu_start: App cpu up.[0m
[0;32mI (1338) spiram: SPI SRAM memory test OK[0m
[0;32mI (1339) heap_init: Initializing. RAM available for dynamic allocation:[0m
[0;32mI (1339) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM[0m
[0;32mI (1345) heap_init: At 3FFB3430 len 0002CBD0 (178 KiB): DRAM[0m
[0;32mI (1352) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM[0m
[0;32mI (1358) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM[0m
[0;32mI (1364) heap_init: At 4009110C len 0000EEF4 (59 KiB): IRAM[0m
[0;32mI (1371) cpu_start: Pro cpu start user code[0m
[0;32mI (1376) spiram: Adding pool of 4096K of external SPI memory to heap allocator[0m
[0;32mI (55) cpu_start: Starting scheduler on PRO CPU.[0m
[0;32mI (0) cpu_start: Starting scheduler on APP CPU.[0m
[0;32mI (56) spiram: Reserving pool of 32K of internal memory for DMA/internal allocations[0m
[0;32mI (56) REC_OPUS_SDCARD: [ 1 ] Mount sdcard[0m
[0;32mI (566) REC_OPUS_SDCARD: [ 2 ] Start codec chip[0m
[0;31mE (566) gpio: gpio_install_isr_service(412): GPIO isr service already installed[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.0] Create audio pipeline for recording[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.1] Create fatfs stream to write data to sdcard[0m
[0;32mI (586) REC_OPUS_SDCARD: [3.2] Create i2s stream to read audio data from codec chip[0m
[0;32mI (596) REC_OPUS_SDCARD: [3.3] Create opus encoder to encode opus format[0m
[0;32mI (606) REC_OPUS_SDCARD: [3.4] Register all elements to audio pipeline[0m
[0;32mI (606) REC_OPUS_SDCARD: [3.5] Link it together [codec_chip]-->i2s_stream-->opus_encoder-->fatfs_stream-->[sdcard][0m
[0;32mI (626) REC_OPUS_SDCARD: [3.6] Setup uri (file as fatfs_stream, opus as opus encoder)[0m
[0;32mI (626) REC_OPUS_SDCARD: [ 4 ] Setup event listener[0m
[0;32mI (636) REC_OPUS_SDCARD: [4.1] Listening event from pipeline[0m
[0;32mI (636) REC_OPUS_SDCARD: [4.2] Listening event from peripherals[0m
[0;32mI (646) REC_OPUS_SDCARD: [ 5 ] Start audio_pipeline[0m
[0;32mI (676) REC_OPUS_SDCARD: [ 6 ] Listen for all pipeline events, record for 10 Seconds[0m