ESP32 Forum

Hi, I'm a newbie trying to do something apparently simple, I can't find the problem, the program seems to hang and I don't get any audio, can someone tell me where the error is?, using esp-idf 4.4 with esp-adf in branch in vscode, the code:

#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_log.h"
#include "audio_pipeline.h"
#include "i2s_stream.h"
#include "raw_stream.h"
#include "board.h"
#include "audio_element.h"
#include "esp_peripherals.h"

static const char *TAG = "PASSTH";

#define RING_BUFFER_SIZE (16384) //16384 //2097152

void app_main(void)
{

ESP_LOGI(TAG, "[ 1 ] Initialize the peripherals");
esp_periph_config_t periph_cfg = DEFAULT_ESP_PERIPH_SET_CONFIG();
esp_periph_set_handle_t set = esp_periph_set_init(&periph_cfg);




audio_pipeline_handle_t pipeline_input;
audio_element_handle_t i2s_stream_reader, i2s_stream_writer;
ringbuf_handle_t ringbuf01;


esp_log_level_set("*", ESP_LOG_INFO);
esp_log_level_set(TAG, ESP_LOG_DEBUG);

ESP_LOGI(TAG, "[ 1 ] Start codec chip");
audio_board_handle_t board_handle = audio_board_init();
audio_hal_ctrl_codec(board_handle->audio_hal, AUDIO_HAL_CODEC_MODE_BOTH, AUDIO_HAL_CTRL_START);
audio_hal_set_volume(board_handle->audio_hal, 100);

ESP_LOGI(TAG, "[ 2 ] Create audio pipeline for input");
audio_pipeline_cfg_t pipeline_input_cfg = DEFAULT_AUDIO_PIPELINE_CONFIG();
pipeline_input = audio_pipeline_init(&pipeline_input_cfg);

ESP_LOGI(TAG, "[ 3.0 ] Create i2s stream to read data from codec chip");
i2s_stream_cfg_t i2s_cfg_read = I2S_STREAM_CFG_DEFAULT();
i2s_cfg_read.type = AUDIO_STREAM_READER;
i2s_cfg_read.i2s_config.sample_rate = 16000;
i2s_cfg_read.i2s_config.bits_per_sample = 16;
i2s_cfg_read.multi_out_num = 1;
i2s_cfg_read.i2s_config.channel_format = I2S_CHANNEL_FMT_ONLY_LEFT;
i2s_cfg_read.i2s_port = 1;
i2s_stream_reader = i2s_stream_init(&i2s_cfg_read);

ESP_LOGI(TAG, "[ 3.1 ] Get information of input and output streams");

// Obtener información del flujo de entrada
audio_element_info_t input_info = AUDIO_ELEMENT_INFO_DEFAULT();
audio_element_getinfo(i2s_stream_reader, &input_info);
ESP_LOGI(TAG, "Input stream info:");
ESP_LOGI(TAG, "- Sample rate: %d", input_info.sample_rates);
ESP_LOGI(TAG, "- Bit depth: %d", input_info.bits);
ESP_LOGI(TAG, "- Channels: %d", input_info.channels);


ESP_LOGI(TAG, "[ 6.2 ] Create i2s stream to write data to codec chip");
i2s_stream_cfg_t i2s_cfg_write = I2S_STREAM_CFG_DEFAULT();
i2s_cfg_write.type = AUDIO_STREAM_WRITER;
// i2s_cfg_write.i2s_config.sample_rate = 16000;
// i2s_cfg_write.i2s_config.bits_per_sample = 16;
// i2s_cfg_write.i2s_config.channel_format = I2S_CHANNEL_FMT_ONLY_LEFT;
// i2s_cfg_write.i2s_port = 0;
//i2s_cfg_write.multi_out_num = 1;
//i2s_cfg_write.i2s_config.channel_format = I2S_CHANNEL_FMT_ONLY_RIGHT;
i2s_stream_writer = i2s_stream_init(&i2s_cfg_write);


audio_element_info_t info = AUDIO_ELEMENT_INFO_DEFAULT();
audio_element_getinfo(i2s_stream_reader, &info);
audio_element_setinfo(i2s_stream_writer, &info);

// Obtener información del flujo de salida
audio_element_info_t output_info = AUDIO_ELEMENT_INFO_DEFAULT();
audio_element_getinfo(i2s_stream_writer, &output_info);
ESP_LOGI(TAG, "Output stream info:");
ESP_LOGI(TAG, "- Sample rate: %d", output_info.sample_rates);
ESP_LOGI(TAG, "- Bit depth: %d", output_info.bits);
ESP_LOGI(TAG, "- Channels: %d", output_info.channels);


ESP_LOGI(TAG, "[ 3.33 ] Register elements to input pipeline");
audio_pipeline_register(pipeline_input, i2s_stream_reader, "i2s_read");
audio_pipeline_register(pipeline_input, i2s_stream_writer, "i2s_write");




ESP_LOGI(TAG, "[3.333] Create a ringbuffer and insert it between i2s_stream_reader and wav_encoder");
ringbuf01 = rb_create(RING_BUFFER_SIZE, 1);
audio_element_set_output_ringbuf(i2s_stream_reader, ringbuf01);
audio_element_set_input_ringbuf(i2s_stream_writer, ringbuf01);




ESP_LOGI(TAG, "[ 3.5 ] Link elements together [codec_chip]-->i2s_stream_reader-->raw_write");
const char *input_link_tag[2] = {"i2s_read","i2s_write"};
audio_pipeline_link(pipeline_input, &input_link_tag[0], 2);


ESP_LOGI(TAG, "[ 4 ] Set up event listener for input pipeline");
audio_event_iface_cfg_t evt_cfg_input = AUDIO_EVENT_IFACE_DEFAULT_CFG();
audio_event_iface_handle_t evt_input = audio_event_iface_init(&evt_cfg_input);
audio_pipeline_set_listener(pipeline_input, evt_input);

ESP_LOGI(TAG, "[4.2] Listening event from peripherals");
audio_event_iface_set_listener(esp_periph_set_get_event_iface(set), evt_input);





ESP_LOGI(TAG, "[ 5 ] Start input pipeline");
audio_pipeline_run(pipeline_input);



ESP_LOGI(TAG, "[ 10 ] Listen for stop event");
audio_event_iface_msg_t msg;


int input_bitrate = input_info.sample_rates * input_info.bits * input_info.channels;
int output_bitrate = output_info.sample_rates * output_info.bits * output_info.channels;


while (1) {
audio_event_iface_msg_t msg;
esp_err_t ret = audio_event_iface_listen(evt_input, &msg, portMAX_DELAY);
//ESP_LOGI(TAG, "Input bitrate: %d bps", input_bitrate);
//ESP_LOGI(TAG, "Output bitrate: %d bps", output_bitrate);



}

ESP_LOGI(TAG, "[ 9 ] Stop pipelines");
audio_pipeline_stop(pipeline_input);
audio_pipeline_wait_for_stop(pipeline_input);
audio_pipeline_terminate(pipeline_input);



audio_pipeline_unregister(pipeline_input, i2s_stream_reader);


audio_pipeline_remove_listener(pipeline_input);

audio_event_iface_destroy(evt_input);
audio_pipeline_deinit(pipeline_input);
audio_element_deinit(i2s_stream_reader);
audio_element_deinit(i2s_stream_writer);
}

The terminal show this:

I (1968) heap_init: Initializing. RAM available for dynamic allocation:
D (1976) heap_init: New heap initialised at 0x3ffae6e0
I (1981) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
D (1987) heap_init: New heap initialised at 0x3ffb2870
I (1992) heap_init: At 3FFB2870 len 0002D790 (181 KiB): DRAM
I (1998) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (2005) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
D (2011) heap_init: New heap initialised at 0x40091ed0
I (2017) heap_init: At 40091ED0 len 0000E130 (56 KiB): IRAM
I (2023) spiram: Adding pool of 4095K of external SPI memory to heap allocator
V (2031) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (2037) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xE
D (2045) intr_alloc: Connected src 46 to int 2 (cpu 0)
D (2051) FLASH_HAL: extra_dummy: 1
V (2054) memspi: raw_chip_id: 1740C8

V (2058) memspi: chip_id: C84017

V (2061) memspi: raw_chip_id: 1740C8

V (2065) memspi: chip_id: C84017

D (2068) spi_flash: trying chip: issi
D (2072) spi_flash: trying chip: gd
I (2076) spi_flash: detected chip: gd
I (2080) spi_flash: flash io: dio
D (2084) cpu_start: calling init function: 0x400e72cc
0x400e72cc: _GLOBAL__sub_I___cxa_get_globals_fast at /builds/idf/crosstool-NG/.build/HOST-x86_64-w64-mingw32/xtensa-esp32-elf/src/gcc/libstdc++-v3/libsupc++/eh_globals.cc:145

D (2089) cpu_start: calling init function: 0x400e7284
0x400e7284: s_set_default_wifi_log_level at C:/esp/esp-idf/components/esp_wifi/src/wifi_init.c:63

D (2094) cpu_start: calling init function: 0x400de998
0x400de998: esp_ipc_init at C:/esp/esp-idf/components/esp_ipc/src/esp_ipc.c:105

D (2100) cpu_start: calling init function: 0x400d2534
0x400d2534: esp_reset_reason_init at C:/esp/esp-idf/components/esp_system/port/soc/esp32/reset_reason.c:68

D (2105) cpu_start: calling init function: 0x400d1964
0x400d1964: esp_ota_init_app_elf_sha256 at C:/esp/esp-idf/components/app_update/esp_app_desc.c:68

V (2110) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (2116) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xC02
D (2125) intr_alloc: Connected src 17 to int 3 (cpu 0)
V (2130) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (2136) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x40E
D (2144) intr_alloc: Connected src 24 to int 9 (cpu 0)
I (2150) cpu_start: Starting scheduler on PRO CPU.
V (0) intr_alloc: esp_intr_alloc_intrstatus (cpu 1): checking args
V (0) intr_alloc: esp_intr_alloc_intrstatus (cpu 1): Args okay. Resulting flags 0x40E
D (10) intr_alloc: Connected src 25 to int 2 (cpu 1)
I (10) cpu_start: Starting scheduler on APP CPU.
D (2200) heap_init: New heap initialised at 0x3ffe0440
D (2200) heap_init: New heap initialised at 0x3ffe4350
I (2210) spiram: Reserving pool of 32K of internal memory for DMA/internal allocations
D (2220) spiram: Allocating block of size 32768 bytes
V (2220) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (2220) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xE
D (2220) intr_alloc: Connected src 16 to int 12 (cpu 0)
I (2240) PASSTH: [ 1 ] Initialize the peripherals
V (2250) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (2260) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x2
D (2260) intr_alloc: Connected src 22 to int 13 (cpu 0)
I (2270) PASSTH: [ 1 ] Start codec chip
I (2280) DRV8311: ES8311 in Slave mode
I (2290) gpio: GPIO[21]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0
W (2300) I2C_BUS: I2C bus has been already created, [port:0]
I (2300) AUDIO_HAL: Codec mode is 3, Ctrl:1
I (2310) PASSTH: [ 2 ] Create audio pipeline for input
I (2310) PASSTH: [ 3.0 ] Create i2s stream to read data from codec chip
I (2320) I2S: APLL expected frequency is 8192000 Hz, real frequency is 8191999 Hz
I (2330) I2S: DMA Malloc info, datalen=blocksize=600, dma_buf_count=3
I (2330) I2S: DMA Malloc info, datalen=blocksize=600, dma_buf_count=3
I (2340) I2S: I2S1, MCLK output by GPIO0
I (2340) PASSTH: [ 3.1 ] Get information of input and output streams
I (2350) PASSTH: Input stream info:
I (2360) PASSTH: - Sample rate: 16000
I (2360) PASSTH: - Bit depth: 16
I (2360) PASSTH: - Channels: 1
I (2370) PASSTH: [ 6.2 ] Create i2s stream to write data to codec chip
I (2380) I2S: APLL expected frequency is 22579200 Hz, real frequency is 22579193 Hz
I (2380) I2S: DMA Malloc info, datalen=blocksize=1200, dma_buf_count=3
I (2390) I2S: DMA Malloc info, datalen=blocksize=1200, dma_buf_count=3
I (2400) I2S: I2S0, MCLK output by GPIO0
I (2400) PASSTH: Output stream info:
I (2410) PASSTH: - Sample rate: 16000
I (2410) PASSTH: - Bit depth: 16
I (2410) PASSTH: - Channels: 1
I (2420) PASSTH: [ 3.33 ] Register elements to input pipeline
I (2430) PASSTH: [3.333] Create a ringbuffer and insert it between i2s_stream_reader and wav_encoder
I (2440) PASSTH: [ 3.5 ] Link elements together [codec_chip]-->i2s_stream_reader-->raw_write
I (2440) AUDIO_PIPELINE: link el->rb, el:0x3f800a3c, tag:i2s_read, rb:0x3f804d74
I (2450) PASSTH: [ 4 ] Set up event listener for input pipeline
I (2460) PASSTH: [4.2] Listening event from peripherals
I (2460) PASSTH: [ 5 ] Start input pipeline
I (2470) AUDIO_THREAD: The i2s_read task allocate stack on internal memory
I (2480) AUDIO_ELEMENT: [i2s_read-0x3f800a3c] Element task created
I (2480) AUDIO_THREAD: The i2s_write task allocate stack on internal memory
I (2490) AUDIO_ELEMENT: [i2s_write-0x3f800bec] Element task created
I (2500) AUDIO_PIPELINE: Func:audio_pipeline_run, Line:359, MEM Total:4410687 Bytes, Inter:329471 Bytes, Dram:272627 Bytes

I (2510) AUDIO_ELEMENT: [i2s_read] AEL_MSG_CMD_RESUME,state:1
I (2520) AUDIO_ELEMENT: [i2s_write] AEL_MSG_CMD_RESUME,state:1
I (2520) I2S_STREAM: AUDIO_STREAM_WRITER
I (2530) AUDIO_PIPELINE: Pipeline started
I (2530) PASSTH: [ 10 ] Listen for stop event

and no audio, i try to print thi on while :

//ESP_LOGI(TAG, "Input bitrate: %d bps", input_bitrate);
//ESP_LOGI(TAG, "Output bitrate: %d bps", output_bitrate); but the program seems to stop when print 6 or 8 times without sound in any moment, It must be something very simple but I don't see it, thanks in advance.

If you want to play record sound directly.
Make sure the format for play and record i2s setting is same.
Lyat mini use I2S 1 to record and i2s 0 to play, make sure the port setting is correct also.
You can let both i2s use default setting and only change the port define for record and play to check whether it works.

Thank you very much for your prompt response. I have done the tests connecting some headphones that worked with the examples of mp3 playback and recording in sd as well. I would dare to say that in this parts I have made all the possible combinations:

ESP_LOGI(TAG, "[ 3.0 ] Create i2s stream to read data from codec chip");
i2s_stream_cfg_t i2s_cfg_read = I2S_STREAM_CFG_DEFAULT();
i2s_cfg_read.type = AUDIO_STREAM_READER;
i2s_cfg_read.i2s_config.sample_rate = 16000;
i2s_cfg_read.i2s_config.bits_per_sample = 16;
i2s_cfg_read.multi_out_num = 1;
i2s_cfg_read.i2s_config.channel_format = I2S_CHANNEL_FMT_ONLY_LEFT;
i2s_cfg_read.i2s_port = 1;
i2s_stream_reader = i2s_stream_init(&i2s_cfg_read);

ESP_LOGI(TAG, "[ 6.2 ] Create i2s stream to write data to codec chip");
i2s_stream_cfg_t i2s_cfg_write = I2S_STREAM_CFG_DEFAULT();
i2s_cfg_write.type = AUDIO_STREAM_WRITER;
// i2s_cfg_write.i2s_config.sample_rate = 16000;
// i2s_cfg_write.i2s_config.bits_per_sample = 16;
// i2s_cfg_write.i2s_config.channel_format = I2S_CHANNEL_FMT_ONLY_LEFT;
i2s_cfg_write.i2s_port = 0;
//i2s_cfg_write.multi_out_num = 1;
i2s_cfg_write.i2s_config.channel_format = I2S_CHANNEL_FMT_ONLY_RIGHT;
i2s_stream_writer = i2s_stream_init(&i2s_cfg_write);

audio_element_info_t info = AUDIO_ELEMENT_INFO_DEFAULT();
audio_element_getinfo(i2s_stream_reader, &info);
audio_element_setinfo(i2s_stream_writer, &info);


I try to combine with is2port0, is2port1 and the sample and bit configurations, perhaps the error is in another part of the program, I even tried playing on the right just in case... Because I understand that this should be possible, right? I mean, even if there is a lag between the recorded and the played audio, but the Lyra shouldn't have any difficulty doing that, right? Thank you very much for your patience.

i was doing tests and i noticed that when i change to 8 or 24 bits, the program works, with terrible quality and some lag, i get the input audio on the output but i get error in the terminal, E (129610) I2S_STREAM: i2s_mono_fix 8bits is not supported the same with 24 bits if use 16 or 32 the program seems to stop after a few iterations and there is no audio.

to use 24bits you need set mclk_multiple to be 384 as notes of IDF
* @note Please set the mclk_multiple to I2S_MCLK_MULTIPLE_384 while using 24 bits data width
* Otherwise the sample rate might be imprecise since the bclk division is not a integer