Question regarding Errata 3.3

[mjmorrison]

I see in the errata document a list of register changes that may help work around the problem of random data loss. Are these changes taken care of in esp-idf? Or is there something that the user needs to do?

I'm wondering what the significance of these changes are, and more importantly is the issue resolved once these register changes are made?

Here is the doc for reference: http://espressif.com/sites/default/file ... p32_en.pdf

[ESP_Angus]

The peripheral bus runs slower than the main CPU. Writes to memory coming from the CPU need to be written onto the slower bus one at a time, but ESP32 has some features in order to buffer these writes so the CPU is not constantly dragged down to running at the peripheral bus speed.

The ECO 3.3 bug means that if you write to the exact same peripheral memory address twice in a row (ie in the next few instructions, at the assembly level), some writes may be lost. If there's a few clock cycles gap between two writes to the same address, then there's no bug.

The bug shouldn't impact any drivers or other code in esp-idf, these account for it. You don't need to worry about the bug unless you're writing code that writes to the same register over and over (like bit-banging a GPIO at >5MHz speeds, or pushing multiple words of data into a FIFO register in a tight loop). In these cases, you may need to either insert some "nop" instructions in between the writes or to change the register base addresses to the ones mentioned in ECO 3.3.

We haven't changed the register base addresses in esp-idf, I'm guessing to conserve performance (moving to those addresses make all writes slightly slower, but the bug is only a problem if you write the exact same address multiple times in a row.) However we're having a discussion about how we can provide those addresses in esp-idf as well.

[mjmorrison]

Ok thank you for the clarification!

Sounds like this will not affect my code.