ESP32 Forum

Posted: **Mon May 07, 2018 2:44 pm**

Hi all,

I tried to use QSPI mode on VSPI module.
Here is my code to initialize VSPI module:

void app_main()
{
    esp_err_t ret;
    spi_device_handle_t spi;
    spi_bus_config_t buscfg={
        .miso_io_num=19,	
        .mosi_io_num=23,
        .sclk_io_num=18,
        .quadwp_io_num=22,	
        .quadhd_io_num=21,	
		.flags = SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MOSI | SPICOMMON_BUSFLAG_MISO | SPICOMMON_BUSFLAG_NATIVE_PINS | SPICOMMON_BUSFLAG_QUAD,
        .max_transfer_sz=PARALLEL_LINES*320*2+8
    };
    spi_device_interface_config_t devcfg={
        .clock_speed_hz=1*1000*1000,           //Clock out at 1 MHz
        .mode=0,                                //SPI mode 0
        .spics_io_num=5,	
        .queue_size=7,                          //We want to be able to queue 7 transactions at a time
        .pre_cb=lcd_spi_pre_transfer_callback,  //Specify pre-transfer callback to handle D/C line
    };
    //Initialize the SPI bus
    ret=spi_bus_initialize(VSPI_HOST, &buscfg, 1);
    ESP_ERROR_CHECK(ret);
    //Attach the LCD to the SPI bus
    ret=spi_bus_add_device(VSPI_HOST, &devcfg, &spi);
    ESP_ERROR_CHECK(ret);
    uint8_t data[2] = {255, 128};
    spi_transaction_t trans;
    trans.tx_buffer = data;               //point to user buffer for Tx data
    trans.rxlength = 0;
    trans.length = 2*8;                 //translate to length in bits
    trans.flags = 0;
    trans.rx_buffer = NULL;
	while(1)
	{
		spi_device_transmit(spi, &trans);
		vTaskDelay(150 / portTICK_RATE_MS);
	}
}

However, when I check with Logic Analyser on all QSPI signals, there are 16 SCK pulses which means it is still single SPI (I expect to have 4 SCK pulses to transfer 2 bytes in QSPI mode).

Have anyone be able to use QSPI mode with VSPI module? Please share information.

Thanks,
Huy

Posted: **Tue May 08, 2018 11:14 am**

Check this

Code: Select all

trans.flags = 0

Posted: **Sat May 19, 2018 10:57 am**

Hi all,

Sorry for long back on this.
I can configure in QSPI mode with below code:

spi_device_handle_t spi;
spi_bus_config_t buscfg={
.miso_io_num = GPIO_NUM_19,
.mosi_io_num = GPIO_NUM_23,
.sclk_io_num = GPIO_NUM_18,
.quadwp_io_num = GPIO_NUM_22,
.quadhd_io_num = GPIO_NUM_21,
.max_transfer_sz= 16*320*2+8
};
spi_device_interface_config_t devcfg={
.clock_speed_hz = 1*1000*1000,
.mode = 0,
.spics_io_num = -1,
.queue_size = 7, //We want to be able to queue 7 transactions at a time
.flags= SPI_DEVICE_HALFDUPLEX,
};
//Initialize the SPI bus
ret = spi_bus_initialize(VSPI_HOST, &buscfg, 1);
if(ret != ESP_OK)
{
ESP_LOGE(TAG, "Failed to add QSPI device");
return false;
}
ret=spi_bus_add_device(VSPI_HOST, &devcfg, &SPIM);
if(ret != ESP_OK)
{
ESP_LOGE(TAG, "Failed to add QSPI device");
return false;
}
gpio_config_t io_conf = {
.intr_type = GPIO_PIN_INTR_DISABLE,
.mode = GPIO_MODE_OUTPUT,
.pin_bit_mask = 1LL << GPIO_NUM_5,
};

ret = gpio_config(&io_conf);
if(ret != ESP_OK)
{
ESP_LOGE(TAG, "Failed to add CS pin");
return FALSE;
}
gpio_set_level(GPIO_NUM_5, 1);

/* Transaction to read a register */
gpio_set_level(GPIO_NUM_5, 0); //active CS
//Send reg addr
spi_transaction_t trans;
memset(&trans, 0, sizeof(trans)); // Zero out the transaction
trans.tx_buffer = data; //point to user buffer for Tx data
trans.rxlength = 0;
trans.length = 3*8; //3 bytes of reg addr
trans.flags = 0;
trans.rx_buffer = NULL;
trans.flags |= SPI_TRANS_MODE_QIO;
spi_device_transmit(spi, &trans);

//Read back reg data
spi_transaction_t trans;
memset(&trans, 0, sizeof(trans)); // Zero out the transaction
trans.length = 0; // transaction length is in bits.
trans.tx_buffer = NULL; // TX Data
trans.rx_buffer = reg_data; // Rx buffer
trans.rxlength = 4 * 8; //4bytes of reg data
trans.flags |= SPI_TRANS_MODE_QIO;
spi_device_transmit(spi, &trans);
//close the transaction
gpio_set_level(GPIO_NUM_5, 1); //inactive CS

I have a waveform of another MCU doing the same thing here to compare. The Tx part of reg address is similar but the RX part of register data is different. I attach them here.
What do I miss in Rx section?

Thanks,
HuyK

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