ESP32 Forum

Is is legal to perform 8- or 16-bit accesses to peripheral registers? If so, what are the semantics (e.g. reads are ok, but not writes; writes have proper byte enables; writes go through but unaccessed bytes are effectively written with zero?)

If it matters, I am primarily interested in the GPIO registers.

Thanks,

-hpa

Unfortunately not. I think this does work in some isolated cases (I can't remember which) but it's not supported.

What is your goal with the GPIO registers?

I'm trying to eliminate every possible cycle of latency I can between an incoming event and its response. Doing byte/word accesses would have eliminated a fair bit of shifting and masking.

The need for such access largely depends on what you want to achieve.
What do you want to get with such operations?

Vader[Ben]

FWIW, Xtensa has a dedicated shift-and-mask instruction, so it's possible you won't gain as much as you think you'd do.

Wrt your original question: Officially, we guarantee only 32-bit accesses to the port and nothing else. (Except for a few very specific cases as indicated in the TRM; iirc the UART data port is one.)

Unoficially: If it works for you, it works My personal guess would be that the problem will be that the GPIO peripheral doesn't have its byte/word-select lines connected, so chances are that if you do a byte/word write, you write 0's (or whatever else the Xtensa decides to set the bus to) to the other bytes in the port. I see no reason why reading from a non-FIFO-register (like the GPIO registers) wouldn't work.

That pretty much summarizes what I need to know to do further experimentation. Thank you!