ESP32 Forum

Hi,
i want to run a task that read data from spi in every 0.25us
(read the data from A/D)
any suggestion for ESP32-S3 ?

Hi,
since you talk about running a task, I assume you are programming for an RTOS In which case, you would never do this - you would have an interrupt handler (Or callback) pick up date from the SPI, and do something with it - write it to an RTOS Queue for example.

Can you give a little more context about what it is your trying to achieve?

You wouldn't normally do that. You would set your SPI bus to the appropriate clock frequency (e.g. 8MHz for 4 MB/s via quad SPI) and then start a single transaction (using DMA) to make the hardware read as much data as you need into a buffer in RAM.

Hmm. It looks like the AD7386-4 needs to be 'tickled' by /CS once for every sample. W.r.t. the IDF SPI driver this means starting a new transaction for every sample, which won't work 4 million times per second.
Need to get a bit more creative here...

I would just use one of the ESP32 timers, set to contintually countdown, and reload. Have it setup to generate an interrupt every time it reaches 0, and then in the ISR toggle the GPIO Pin, directly. This will be short enough to be an acceptable ISR.

Do you know how to use the Timers in this manner? And calculate the values for 25 uS? If not, tell us the clock frequency your ESP32 is running, and we will try to help out.

greycon wrote: ↑

Thu Oct 03, 2024 1:20 pm

I would just use one of the ESP32 timers, set to contintually countdown, and reload.
... And calculate the values for 25 uS?

OP needs 4MHz, i.e. 0.25us intervals, not 25us.
0.25us corresponds to 60 CPU clock cycles @ 240 MHz; that's barely enough to even enter an ISR.

On a 240MHz core, I would have expected that I could easily enter an ISR, toggle a Port Pin and return in 60 cycles, but it's a gut feeling based on other SOCs. But you won't be doing much else with that core.

Perhaps the LED PWM Controller could be programmed to do the job - so no CPU load. But OP would still presumably need to consume the 40 Million Samples each second...

@MicroController - just read your previous post - so DMA to get the data from the device - sounds right.

From the Espressif Docs:

The LEDC can be used for generating signals at much higher frequencies that are sufficient enough to clock other devices, e.g., a digital camera module. In this case, the maximum available frequency is 40 MHz with duty resolution of 1 bit. This means that the duty cycle is fixed at 50% and cannot be adjusted.

Taken from: https://docs.espressif.com/projects/esp ... resolution

Looks like that might work to trigger the ADC.

greycon wrote: ↑

Thu Oct 03, 2024 3:01 pm

On a 240MHz core, I would have expected that I could easily enter an ISR, toggle a Port Pin and return in 60 cycles,

I know. But there's more going on in terms of setting up the context for running an ISR function written in C than one would expect: https://github.com/espressif/esp-idf/bl ... ors.S#L204
Assembly/bare-metal, without integration with FreeRTOS, could be a bit faster.

The problem I see for the OP is that
a) he needs a ~4MHz clock to trigger the ADC ("/CS"),
b) witin one time window of 250ns (4MHz clock cycle) he needs to send 4-6 clock pulses to the ADC ("SCK") and
c) read 4 bits of input for each SCK pulse.

Generating the proper frequencies is not much of a problem; precisely synchronizing the clock signals and input sampling is.

Right now, I'm contemplating about the possibility of running the ESP-SPI in slave mode while generating the 4MHz /CS and 16-24MHz SCK signals via another peripheral (LEDC,...), feeding the two clock signals to both the ESP-SPI and the ADC.

I see your point - sounds like you are on top of this. I look forward to reading your solution - I think you are more experienced here than I am.