ESP32 Forum

I'm currently puzzled about the fact that the I2S periferial has so many clock deviders, but I can't get my head around it.
(Tried browsing the forum with even less clearance).

So can anyone please sum up for me the maximum possible clocks for BCK and maximum sample rates?
(i'm open to actual register settings here).

Thanks in Advance!

I think max bck is PLL/8 so 40mhz

I thought it could be more than that ... anyway I hope it will be fast enough for me.
Anyways thanks for the input.