I2S in parallel mode
Posted: Fri Jan 05, 2018 10:52 am
Hi All,
I could not find proper information in technical ref manual on how can I configure the data bus with in I2S ADC/DAC mode.
I have seen that in Figure 68, the DAC is shown with an 8bit wide bus, but not sure which registers should be set to achieve this.
Also I wish to know it is possible to use 8bit wide data in ADC mode as well, and is it necessary to pass the data to the ADC or can I use the data for anything else?
I'm asking, because I want to implement a HyperRAM using the I2S ADC/DAC modes.
Thanks & regrads,
Bence
I could not find proper information in technical ref manual on how can I configure the data bus with in I2S ADC/DAC mode.
I have seen that in Figure 68, the DAC is shown with an 8bit wide bus, but not sure which registers should be set to achieve this.
Also I wish to know it is possible to use 8bit wide data in ADC mode as well, and is it necessary to pass the data to the ADC or can I use the data for anything else?
I'm asking, because I want to implement a HyperRAM using the I2S ADC/DAC modes.
Thanks & regrads,
Bence