ESP32S3 - PDM (Master Rx) - Over 104kHz not working

[timstercb]

I've been experimenting with PDM Rx up over 100kHz, and it appears that as soon as the MCLK_DIV goes from 3 to 2, that the MCLK goes to 10MHz, and that's it. That happens for anything over 104000 Hz Sampling Frequency.

I'm using ESP-IDF-5.1.4

I'm thinking (hoping) that it's something in the driver w/ all the clock setup - but when I look at all the underling calculations, they seem ok.

I do see this bit of code in the driver - so am thinking it might be an underlying hardware issue - but *maybe* with (another) workaround?

/**
* @brief Configure I2S RX module clock divider
*
* @param hw Peripheral I2S hardware instance address.
* @param mclk_div The mclk division coefficients
*/
static inline void i2s_ll_rx_set_mclk(i2s_dev_t *hw, const i2s_ll_mclk_div_t *mclk_div)
{
/* Workaround for inaccurate clock while switching from a relatively low sample rate to a high sample rate
* Set to particular coefficients first then update to the target coefficients,
* otherwise the clock division might be inaccurate.
* the general idea is to set a value that impossible to calculate from the regular decimal */
i2s_ll_rx_set_raw_clk_div(hw, 7, 317, 7, 3, 0);

Thanks!
-Tim