ESP32 Forum

ESP32 Official Forum
http://esp32.io/

Guru Meditation Error: Core 0 panic'ed (Interrupt wdt timeout on CPU0) when using 12v supply

http://esp32.io/viewtopic.php?f=2&t=40523

Page 1 of 1

Guru Meditation Error: Core 0 panic'ed (Interrupt wdt timeout on CPU0) when using 12v supply

Posted: Fri Jun 21, 2024 3:26 pm
by Isaac_Atia
I know this question has been asked frequently but somehow they don't provide me with the answers I seek so I am asking again.

I have an application running on a custom board with ESP32-S3-WROOM-1-N16R2 and some other sensors and power supply modules. I designed my power supply in such a way that I can power the board with either 5v from a usb supply or 12v external supply. Either way I have two regulators onboard to convert either of the supplies to 3.3V for the main chip and low power sensors and 3.8V for my cellular module as it requires high power. I also have a power mux so in event that one is writing code for the high power cellular module and would like to debug, they can have both 5v supply and 12v external supply connected and the mux will prioritize the 5v supply and convert that to 3.3v for the board + low power sensors while the 12v will be stepped down to 3.8v for the cellular module. However if you have only usb power connected, you only get 3.3v without the 3.8v and when you have the 12v external supply supply connected you get both the 3.3v and 3.8v respectively. The reason for this is because the board will be used in a 12v environment in the long run. I have added this circuit as an attachment.

I'm writing my code using esp-idf port of freertos with all tasks running on cpu_0, and, when I power the board using 5v/usb supply onlu the code runs as expected as seen from the output below;

Code: Select all

V (3297) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (3297) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x802
D (3297) intr_alloc: Connected src 37 to int 17 (cpu 0)
I (3297) gpio: GPIO[4]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3307) gpio: GPIO[5]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3317) gpio: GPIO[2]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3327) gpio: GPIO[37]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3337) gpio: GPIO[39]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3347) gpio: GPIO[41]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3357) gpio: GPIO[45]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3367) gpio: GPIO[47]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3377) gpio: GPIO[48]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3387) gpio: GPIO[11]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (3397) gpio: GPIO[12]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (3407) gpio: GPIO[13]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (3417) gpio: GPIO[14]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (3427) gpio: GPIO[35]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:5 
I (3437) gpio: GPIO[36]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:5 
V (3437) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (3447) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x2
D (3457) intr_alloc: Connected src 16 to int 18 (cpu 0)
V (3457) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (3457) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xE
D (3497) intr_alloc: Connected src 27 to int 19 (cpu 0)
V (3567) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (3647) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xE
D (3737) intr_alloc: Connected src 42 to int 20 (cpu 0)
Starting pinned tasks now
I (3837) main_task: Returned from app_main()
However when I include the 12v external supply, still running the same code with absolutely no changes, I run into an error as shown from the debug message below and error keeps on looping;

Code: Select all

Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403765b0
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3818,len:0x1750
load:0x403c9700,len:0x4
load:0x403c9704,len:0xc00
load:0x403cc700,len:0x2e04
entry 0x403c9908
I (26) boot: ESP-IDF 5.1.2 2nd stage bootloader
I (26) boot: compile time Jun 20 2024 16:13:52
I (26) boot: Multicore bootloader
I (29) boot: chip revision: v0.2
I (33) boot.esp32s3: Boot SPI Speed : 80MHz
I (38) boot.esp32s3: SPI Mode       : DIO
I (42) boot.esp32s3: SPI Flash Size : 16MB
I (47) boot: Enabling RNG early entropy source...
I (53) boot: Partition Table:
I (56) boot: ## Label            Usage          Type ST Offset   Length
I (64) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (71) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (78) boot:  2 factory          factory app      00 00 00010000 00100000
I (86) boot: End of partition table
I (90) esp_image: segment 0: paddr=00010020 vaddr=3c030020 size=0cf0ch ( 53004) map
I (108) esp_image: segment 1: paddr=0001cf34 vaddr=3fc93c00 size=02afch ( 11004) load
I (111) esp_image: segment 2: paddr=0001fa38 vaddr=40374000 size=005e0h (  1504) load
I (116) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=21e14h (138772) map
I (149) esp_image: segment 4: paddr=00041e3c vaddr=403745e0 size=0f5dch ( 62940) load
I (170) boot: Loaded app from partition at offset 0x10000
I (170) boot: Disabling RNG early entropy source...
I (181) cpu_start: Multicore app
D (181) flash HPM: HPM with dummy, status is 3
V (182) mmap: after coalescing, 1 regions are left
I (183) cpu_start: Pro cpu up.
I (187) cpu_start: Starting app cpu, entry point is 0x403761a0
I (0) cpu_start: App cpu up.
V CACHE_ERR: illegal error intr clr & ena mask is: 0x3f
V D CA(2C02H) E_clEkRR: R: TcCo_rSLe O1W _aCcLcKe scsa leirbrroart iionn vtalrue : c39lr3 582&1 n0am 
ask is: 0x1f
V CACHE_ERR: illegal error intr clr & ena mask is: 0x3f
V CACHE_ERR: core 0 access error intr clr & ena mask is: 0x1f
I (221) cpu_start: Pro cpu start user code
I (224) cpu_start: cpu freq: 160000000 Hz
I (228) cpu_start: Application information:
I (233) cpu_start: Project name:     Wahu_BCM
I (238) cpu_start: App version:      301ae46-dirty
I (244) cpu_start: Compile time:     Jun 20 2024 16:11:54
I (250) cpu_start: ELF file SHA256:  ccf151cf4e222052...
I (256) cpu_start: ESP-IDF:          5.1.2
I (261) cpu_start: Min chip rev:     v0.0
I (265) cpu_start: Max chip rev:     v0.99 
I (270) cpu_start: Chip rev:         v0.2
V (275) memory_layout: reserved range is 0x3c03ceec - 0x3c03cf14
D (281) memory_layout: Checking 6 reserved memory ranges:
D (286) memory_layout: Reserved memory range 0x3fc84000 - 0x3fc93c00
D (293) memory_layout: Reserved memory range 0x3fc93c00 - 0x3fc970e0
D (299) memory_layout: Reserved memory range 0x3fceee34 - 0x3fcf0000
D (306) memory_layout: Reserved memory range 0x40374000 - 0x40383c00
D (312) memory_layout: Reserved memory range 0x600fe000 - 0x600fe010
D (318) memory_layout: Reserved memory range 0x600fffe8 - 0x60100000
D (325) memory_layout: Building list of available memory regions:
V (331) memory_layout: Examining memory region 0x40374000 - 0x40378000
V (338) memory_layout: Region 0x40374000 - 0x40378000 inside of reserved 0x40374000 - 0x40383c00
V (347) memory_layout: Examining memory region 0x3fc88000 - 0x3fc90000
V (353) memory_layout: Region 0x3fc88000 - 0x3fc90000 inside of reserved 0x3fc84000 - 0x3fc93c00
V (362) memory_layout: Examining memory region 0x3fc90000 - 0x3fca0000
V (369) memory_layout: Start of region 0x3fc90000 - 0x3fca0000 overlaps reserved 0x3fc84000 - 0x3fc93c00
V (378) memory_layout: Start of region 0x3fc93c00 - 0x3fca0000 overlaps reserved 0x3fc93c00 - 0x3fc970e0
D (388) memory_layout: Available memory region 0x3fc970e0 - 0x3fca0000
V (394) memory_layout: Examining memory region 0x3fca0000 - 0x3fcb0000
D (401) memory_layout: Available memory region 0x3fca0000 - 0x3fcb0000
V (407) memory_layout: Examining memory region 0x3fcb0000 - 0x3fcc0000
D (414) memory_layout: Available memory region 0x3fcb0000 - 0x3fcc0000
V (421) memory_layout: Examining memory region 0x3fcc0000 - 0x3fcd0000
D (427) memory_layout: Available memory region 0x3fcc0000 - 0x3fcd0000
V (434) memory_layout: Examining memory region 0x3fcd0000 - 0x3fce0000
D (440) memory_layout: Available memory region 0x3fcd0000 - 0x3fce0000
V (447) memory_layout: Examining memory region 0x3fce0000 - 0x3fce9710
D (454) memory_layout: Available memory region 0x3fce0000 - 0x3fce9710
V (460) memory_layout: Examining memory region 0x3fce9710 - 0x3fcf0000
V (467) memory_layout: End of region 0x3fce9710 - 0x3fcf0000 overlaps reserved 0x3fceee34 - 0x3fcf0000
D (476) memory_layout: Available memory region 0x3fce9710 - 0x3fceee34
V (483) memory_layout: Examining memory region 0x3fcf0000 - 0x3fcf8000
D (489) memory_layout: Available memory region 0x3fcf0000 - 0x3fcf8000
V (496) memory_layout: Examining memory region 0x600fe000 - 0x60100000
V (503) memory_layout: Start of region 0x600fe000 - 0x60100000 overlaps reserved 0x600fe000 - 0x600fe010
V (512) memory_layout: End of region 0x600fe010 - 0x60100000 overlaps reserved 0x600fffe8 - 0x60100000
D (522) memory_layout: Available memory region 0x600fe010 - 0x600fffe8
I (528) heap_init: Initializing. RAM available for dynamic allocation:
D (535) heap_init: New heap initialised at 0x3fc970e0
I (540) heap_init: At 3FC970E0 len 00052630 (329 KiB): DRAM
I (547) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
D (553) heap_init: New heap initialised at 0x3fcf0000
I (558) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
D (565) heap_init: New heap initialised at 0x600fe010
I (570) heap_init: At 600FE010 len 00001FD8 (7 KiB): RTCRAM
V (576) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (582) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x40E
D (591) intr_alloc: Connected src 39 to int 2 (cpu 0)
V (596) memspi: raw_chip_id: 1840C8

V (599) memspi: chip_id: C84018

V (603) memspi: raw_chip_id: 1840C8

V (606) memspi: chip_id: C84018

D (610) spi_flash: trying chip: issi
D (614) spi_flash: trying chip: gd
I (617) spi_flash: detected chip: gd
I (621) spi_flash: flash io: dio
D (625) cpu_start: calling init function: 0x4200a0dc
D (630) cpu_start: calling init function: 0x42009060
D (635) cpu_start: calling init function: 0x42007708
D (640) cpu_start: calling init function: 0x4200b1b8 on core: 0
V (647) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (653) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xC02
D (661) intr_alloc: Connected src 59 to int 3 (cpu 0)
D (666) cpu_start: calling init function: 0x4201d2b4 on core: 0
I (672) sleep: Configure to isolate all GPIO pins in sleep state
I (679) sleep: Enable automatic switching of GPIO sleep configuration
D (686) cpu_start: calling init function: 0x4200af24 on core: 0
V (692) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (698) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x40E
D (706) intr_alloc: Connected src 79 to int 9 (cpu 0)
I (711) app_start: Starting scheduler on CPU0
V (716) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (716) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x402
D (716) intr_alloc: Connected src 57 to int 12 (cpu 0)
V (716) intr_alloc: esp_intr_alloc_intrstatus (cpu 1): checking args
V (726) intr_alloc: esp_intr_alloc_intrstatus (cpu 1): Args okay. Resulting flags 0x40E
D (726) intr_alloc: Connected src 80 to int 2 (cpu 1)
I (736) app_start: Starting scheduler on CPU1
V (736) intr_alloc: esp_intr_alloc_intrstatus (cpu 1): checking args
V (746) intr_alloc: esp_intr_alloc_intrstatus (cpu 1): Args okay. Resulting flags 0x402
D (756) intr_alloc: Connected src 58 to int 3 (cpu 1)
I (716) main_task: Started on CPU0
D (766) heap_init: New heap initialised at 0x3fce9710
V (766) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (776) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xE
D (786) intr_alloc: Connected src 52 to int 13 (cpu 0)
I (786) main_task: Calling app_main()
V (3296) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (3296) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x802
D (3296) intr_alloc: Connected src 37 to int 17 (cpu 0)
I (3296) gpio: GPIO[4]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3306) gpio: GPIO[5]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3316) gpio: GPIO[2]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3326) gpio: GPIO[37]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3336) gpio: GPIO[39]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3346) gpio: GPIO[41]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3356) gpio: GPIO[45]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3366) gpio: GPIO[47]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3376) gpio: GPIO[48]| InputEn: 1| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (3386) gpio: GPIO[11]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (3396) gpio: GPIO[12]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (3406) gpio: GPIO[13]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (3416) gpio: GPIO[14]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (3426) gpio: GPIO[35]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:5 
I (3436) gpio: GPIO[36]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:5 
V (3436) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (3446) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x2
Guru Meditation Error: Core  0 panic'ed (Interrupt wdt timeout on CPU0). 

Core  0 register dump:
PC      : 0x403755f0  PS      : 0x00050034  A0      : 0x4037739c  A1      : 0x3fc94c50  
A2      : 0x00000000  A3      : 0xfffffffe  A4      : 0x3fc9c7fc  A5      : 0x4037e7b6  
A6      : 0x00000000  A7      : 0x3fc9caac  A8      : 0x3fc93c10  A9      : 0x3fc94c30  
A10     : 0x00000000  A11     : 0x00000020  A12     : 0x00000010  A13     : 0x00000010  
A14     : 0x60004000  A15     : 0x3fc9cc58  SAR     : 0x0000001c  EXCCAUSE: 0x00000005  
EXCVADDR: 0x00000000  LBEG    : 0x00000000  LEND    : 0x00000000  LCOUNT  : 0x00000000  
Core  0 was running in ISR context:
EPC1    : 0x42020993  EPC2    : 0x00000000  EPC3    : 0x00000000  EPC4    : 0x403755f0


Backtrace: 0x403755ed:0x3fc94c50 0x40377399:0x3fc94c70 0x400559dd:0x3fc98270 |<-CORRUPTED


Core  1 register dump:
PC      : 0x40378d86  PS      : 0x00060734  A0      : 0x8200a5e5  A1      : 0x3fc9bb10  
A2      : 0x00000000  A3      : 0x00000000  A4      : 0x3fc989e0  A5      : 0x3fc989c0  
A6      : 0x40376108  A7      : 0x00000001  A8      : 0x82009812  A9      : 0x3fc9bad0  
A10     : 0x00000000  A11     : 0x00000000  A12     : 0x3fc989c0  A13     : 0x3fc98990  
A14     : 0x00000001  A15     : 0x00000001  SAR     : 0x00000000  EXCCAUSE: 0x00000005  
EXCVADDR: 0x00000000  LBEG    : 0x00000000  LEND    : 0x00000000  LCOUNT  : 0x00000000  


Backtrace: 0x40378d83:0x3fc9bb10 0x4200a5e2:0x3fc9bb30 0x4037c289:0x3fc9bb50 0x4037e239:0x3fc9bb70
Has anyone experienced a similar situation and how did you go about solving it.

Re: Guru Meditation Error: Core 0 panic'ed (Interrupt wdt timeout on CPU0) when using 12v supply

Posted: Sun Jun 23, 2024 2:31 am
by ESP_Sprite
Can we have a look at your code? Specifically, are you using GPIO interrupts?

Re: Guru Meditation Error: Core 0 panic'ed (Interrupt wdt timeout on CPU0) when using 12v supply

Posted: Mon Jun 24, 2024 12:40 am
by Isaac_Atia
ESP_Sprite wrote: ↑
Sun Jun 23, 2024 2:31 am
 Can we have a look at your code? Specifically, are you using GPIO interrupts?
For reasons beyond my control I am not permitted to show the code because it will end up in a product. However to answer your question, yes I am using GPIO interrupts (2 infact).

An observation I also made recently after debugging further, I realized that by removing the GPIO interrupts, the code works just fine and only produces the error up when the GPIO interrupt is present.

Re: Guru Meditation Error: Core 0 panic'ed (Interrupt wdt timeout on CPU0) when using 12v supply

Posted: Mon Jun 24, 2024 1:45 am
by ESP_Sprite
Are you setting up the GPIOs (and enabling interrupts on them) before you install the GPIO driver that handles those interrupts, perhaps?

Re: Guru Meditation Error: Core 0 panic'ed (Interrupt wdt timeout on CPU0) when using 12v supply

Posted: Mon Jun 24, 2024 9:42 am
by Isaac_Atia
ESP_Sprite wrote: ↑
Mon Jun 24, 2024 1:45 am
 Are you setting up the GPIOs (and enabling interrupts on them) before you install the GPIO driver that handles those interrupts, perhaps?
Yes exactly. Also I have gotten permission to share part of the code as long as it isn't anything critical. So here is how I am setting and installing the gpio with interrupt.

Code: Select all

gpio_config_t intr_conf = {
        .mode = GPIO_MODE_INPUT,
        .pin_bit_mask = (1ULL << ON_SIGNAL) | (1ULL << COIL_OUTPUT),
        .intr_type = GPIO_INTR_ANYEDGE,
        .pull_down_en = GPIO_PULLDOWN_DISABLE,
        .pull_up_en = GPIO_PULLUP_DISABLE};
    ESP_ERROR_CHECK(gpio_config(&intr_conf));
    // gpio_set_intr_type(ON_SIGNAL, GPIO_INTR_LOW_LEVEL);
    ESP_ERROR_CHECK(gpio_install_isr_service(ESP_INTR_FLAG_LEVEL1));
    ESP_ERROR_CHECK(gpio_isr_handler_add(ON_SIGNAL, ignitionOff, (void *)ON_SIGNAL));
    ESP_ERROR_CHECK(gpio_isr_handler_add(COIL_OUTPUT, ignitionOff, (void *)COIL_OUTPUT));

Re: Guru Meditation Error: Core 0 panic'ed (Interrupt wdt timeout on CPU0) when using 12v supply

Posted: Thu Jun 27, 2024 8:25 am
by ESP_Sprite
Flip those. Install the ISR handlers first, and only afterwards configure the GPIO pins. Otherwise the GPIO interrupt will trigger without anything acknowledging that interrupt, and that leads to issues.
All times are UTC
Page 1 of 1
Powered by phpBB® Forum Software © phpBB Limited
https://www.phpbb.com/