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uart tx interrupt

http://esp32.io/viewtopic.php?f=2&t=38467

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uart tx interrupt

Posted: Mon Feb 19, 2024 12:03 pm
by Melika
Hi every one.i need to handle tx uart interrupt and i write this code,but i get error.How can i solve this?my esp idf version is 4.4.6
my code:
Code: [Select all] [Expand/Collapse]
  1. #include "nvs_flash.h"
  2. #include "nvs.h"
  3. #include <string.h>
  4. #include "freertos/FreeRTOS.h"
  5. #include "freertos/task.h"
  6. #include "esp_netif.h"
  7. #include "esp_wifi.h"
  8. #include "esp_event.h"
  9. #include "esp_log.h"
  10. #include "driver/gpio.h"
  11. #include "lwip/err.h"
  12. #include "lwip/sys.h"
  13. #include "esp_log.h"
  14. #include "esp_event.h"
  15. #include "freertos/event_groups.h"
  16. #include "sdkconfig.h"
  17. #include <unistd.h>
  18. #include <sys/socket.h>
  19. #include <stdio.h>
  20. #include <errno.h>
  21. #include <netdb.h>            // struct addrinfo
  22. #include <arpa/inet.h>
  23. #include "driver/uart.h"
  24. #include "esp_system.h"
  25. #include "esp_intr_alloc.h"
  26. #include "soc/uart_reg.h"
  27. #include "soc/uart_struct.h"
  28. #include <sys/time.h>
  29. #include "esp_attr.h"
  30. #include "soc/uart_periph.h"
  31. #include "soc/uart_struct.h"
  32. #include "hal/uart_types.h"
  33. #include "hal/uart_ll.h"   //for status iin
  34.  
  35.  
  36.  
  37. static const char *TAG = "uart_events";
  38.  TaskHandle_t HandleCore0= NULL;
  39. #define EX_UART_NUM UART_NUM_0
  40. #define PATTERN_CHR_NUM    (3)         /*!< Set the number of consecutive and identical characters received by receiver which defines a UART pattern*/
  41.  
  42. #define BUF_SIZE (1024)
  43. static QueueHandle_t uart0_queue;
  44. //static uart_isr_handle_t *handle_console;
  45. static intr_handle_t handle_console;
  46. static uart_obj_t *p_uart[UART_NUM_MAX] = {0};
  47. bool Send=false;
  48. static void uart_event_task(void *pvParameters)
  49. {
  50.     const char a="hello";
  51.      while(1)
  52.      {
  53.              int size=5;
  54.            vTaskDelay(pdMS_TO_TICKS(500));
  55.  
  56.           if(Send)
  57.           {
  58.             xSemaphoreTake(p_uart[EX_UART_NUM]->tx_mux, (portTickType)portMAX_DELAY);
  59.             p_uart[EX_UART_NUM]->coll_det_flg = false;
  60.             int offset = 0;
  61.             uart_tx_data_t evt;
  62.             evt.tx_data.size = size;
  63.             evt.tx_data.brk_len = 0;
  64.             evt.type = UART_DATA;
  65.             xRingbufferSend(p_uart[EX_UART_NUM]->tx_ring_buf, (void *) &evt, sizeof(uart_tx_data_t), portMAX_DELAY);
  66.             xRingbufferSend(p_uart[EX_UART_NUM]->tx_ring_buf, (void *) (a), size, portMAX_DELAY);
  67.             xSemaphoreGive(p_uart[EX_UART_NUM]->tx_mux);
  68.             Send=false;
  69.           }
  70.           vTaskDelay(pdMS_TO_TICKS(500));
  71.       }
  72.    
  73.  
  74. }
  75. /*
  76.  * Define UART interrupt subroutine to ackowledge interrupt
  77.  */  
  78. static void IRAM_ATTR uart_intr_handle(void *arg)
  79. {
  80.   uint16_t rx_fifo_len, status;
  81.   status = UART0.int_st.val; // read UART interrupt Status
  82.   int i=0;
  83.    if(status == UART_INTR_TXFIFO_EMPTY)   //if we have tx interrupt
  84.    {
  85.      Send=true;
  86.      uart_clear_intr_status(EX_UART_NUM,UART_INTR_TXFIFO_EMPTY);
  87.    }
  88. }
  89.  
  90.  
  91. void app_main()
  92. {
  93.     int ret;
  94.     esp_log_level_set(TAG, ESP_LOG_INFO);
  95.     uart_config_t uart_config = {
  96.         .baud_rate = 115200,
  97.         .data_bits = UART_DATA_8_BITS,
  98.         .parity = UART_PARITY_DISABLE,
  99.         .stop_bits = UART_STOP_BITS_1,
  100.         .flow_ctrl = UART_HW_FLOWCTRL_DISABLE
  101.     };
  102.  
  103.     ESP_ERROR_CHECK(uart_param_config(EX_UART_NUM, &uart_config));
  104.     esp_log_level_set(TAG, ESP_LOG_INFO);
  105.     ESP_ERROR_CHECK(uart_set_pin(EX_UART_NUM, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE,
  106.       UART_PIN_NO_CHANGE));
  107.     ESP_ERROR_CHECK(uart_driver_install(EX_UART_NUM, BUF_SIZE*2, BUF_SIZE*2,10, uart0_queue, 0));
  108.     ESP_ERROR_CHECK(uart_isr_free(EX_UART_NUM));
  109.     ESP_ERROR_CHECK(uart_isr_register(EX_UART_NUM,uart_intr_handle, NULL, ESP_INTR_FLAG_IRAM, &handle_console));
  110.         ESP_ERROR_CHECK(uart_enable_tx_intr(EX_UART_NUM, 1, 1));
  111.        xTaskCreate(uart_event_task, "uart_event_task", 4096, NULL, 10, NULL);
  112.  
  113.   }
  114.    
  115.  
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and my error:
Code: [Select all] [Expand/Collapse]
  1. Guru Meditation Error: Core  0 panic'ed (Interrupt wdt timeout on CPU0).
  2.  
  3. Core  0 register dump:
  4. PC      : 0x40085c2b  PS      : 0x00060034  A0      : 0x80085bcc  A1      : 0x3ffb1040
  5. 0x40085c2b: uart_ll_clr_intsts_mask at C:/Users/user/esp/esp-idf/components/hal/esp32/include/hal/uart_ll.h:199
  6. (inlined by) uart_clear_intr_status at C:/Users/user/esp/esp-idf/components/driver/uart.c:366
  7.  
  8. A2      : 0x3ff40000  A3      : 0x00000002  A4      : 0x80091178  A5      : 0x3ffb5810
  9. A6      : 0x00000003  A7      : 0x3ffb1040  A8      : 0x00060920  A9      : 0x00000000
  10. A10     : 0xffffffff  A11     : 0x3ffb5800  A12     : 0x80084fa0  A13     : 0x3ffb57d0
  11. A14     : 0x00000000  A15     : 0x00008000  SAR     : 0x00000011  EXCCAUSE: 0x00000005
  12. EXCVADDR: 0x00000000  LBEG    : 0x00000000  LEND    : 0x00000000  LCOUNT  : 0x00000000
  13. Core  0 was running in ISR context:
  14. EPC1    : 0x400d1f17  EPC2    : 0x00000000  EPC3    : 0x00000000  EPC4    : 0x40085c2b
  15. 0x400d1f17: panic_print_char_uart at C:/Users/user/esp/esp-idf/components/esp_system/panic.c:80
  16.  
  17. 0x40085c2b: uart_ll_clr_intsts_mask at C:/Users/user/esp/esp-idf/components/hal/esp32/include/hal/uart_ll.h:199
  18. (inlined by) uart_clear_intr_status at C:/Users/user/esp/esp-idf/components/driver/uart.c:366
  19.  
  20.  
  21.  
  22. Backtrace: 0x40085c28:0x3ffb1040 0x40085bc9:0x3ffb1090 0x4008532d:0x3ffb10d0 0x400ebdfd:0x3ffb5850 0x400e0775:0x3ffb5870 0x400df3e5:0x3ffb5890 0x4008fda3:0x3ffb58c0
  23. 0x40085c28: uart_ll_clr_intsts_mask at C:/Users/user/esp/esp-idf/components/hal/esp32/include/hal/uart_ll.h:199
  24. (inlined by) uart_clear_intr_status at C:/Users/user/esp/esp-idf/components/driver/uart.c:366
  25.  
  26. 0x40085bc9: uart_intr_handle at C:/Users/user/Desktop/uart_async_rxtxtasks/main/uart_async_rxtxtasks_main.c:116
  27.  
  28. 0x4008532d: _xt_lowint1 at C:/Users/user/esp/esp-idf/components/freertos/port/xtensa/xtensa_vectors.S:1114
  29.  
  30. 0x400ebdfd: cpu_ll_waiti at C:/Users/user/esp/esp-idf/components/hal/esp32/include/hal/cpu_ll.h:183
  31.  
  32. 0x400e0775: esp_pm_impl_waiti at C:/Users/user/esp/esp-idf/components/esp_pm/pm_impl.c:847
  33.  
  34. 0x400df3e5: esp_vApplicationIdleHook at C:/Users/user/esp/esp-idf/components/esp_system/freertos_hooks.c:63
  35.  
  36. 0x4008fda3: prvIdleTask at C:/Users/user/esp/esp-idf/components/freertos/tasks.c:3987 (discriminator 1)
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Re: uart tx interrupt

Posted: Tue Feb 20, 2024 9:44 am
by MicroController
How can i solve this?
You could just use the IDF's UART driver, either synchronously or event-based.

Re: uart tx interrupt

Posted: Wed Feb 21, 2024 9:48 am
by Melika
MicroController wrote: ↑
Tue Feb 20, 2024 9:44 am
You could just use the IDF's UART driver, either synchronously or event-based.
Hi thanks for answer.How can i use it?

Re: uart tx interrupt

Posted: Wed Feb 21, 2024 11:41 am
by MicroController
Take one of the examples and adapt it to your needs.
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