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ESP32 C3 delay between SPI transactions

http://esp32.io/viewtopic.php?f=2&t=33744

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ESP32 C3 delay between SPI transactions

Posted: Sat May 20, 2023 1:27 pm
by khu8rt
I am using ESP32 C3 Wroom 02 Dev kit to communicate to V9203 chip using SPI. I already tested the communication using Raspberry pi 3 and it works.
For a successul write opertaion, i have to send 3 * 32bit frames. but the ESP32 takes quite a long time between each SPI frame.
Between the first two frames its 5ms and for the last frame it takes 10ms.

Here is my code:
Code: [Select all] [Expand/Collapse]
  1. /* SPI Slave example, sender (uses SPI master driver)
  2.  
  3.    This example code is in the Public Domain (or CC0 licensed, at your option.)
  4.  
  5.    Unless required by applicable law or agreed to in writing, this
  6.    software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
  7.    CONDITIONS OF ANY KIND, either express or implied.
  8. */
  9. #include <stdio.h>
  10. #include <stdint.h>
  11. #include <stddef.h>
  12. #include <string.h>
  13. #include <unistd.h>
  14.  
  15.  
  16. #include "freertos/FreeRTOS.h"
  17. #include "freertos/task.h"
  18. #include "freertos/semphr.h"
  19. #include "freertos/queue.h"
  20.  
  21. #include "lwip/sockets.h"
  22. #include "lwip/dns.h"
  23. #include "lwip/netdb.h"
  24. #include "lwip/igmp.h"
  25.  
  26. #include "esp_wifi.h"
  27. #include "esp_system.h"
  28. #include "esp_event.h"
  29. #include "nvs_flash.h"
  30. #include "soc/rtc_periph.h"
  31. #include "driver/spi_master.h"
  32. #include "esp_log.h"
  33. #include "esp_spi_flash.h"
  34.  
  35. #include "driver/gpio.h"
  36. #include "esp_intr_alloc.h"
  37.  
  38. #define SENDER_HOST SPI2_HOST
  39.  
  40. static const char *TAG = "Energy meter";
  41. #define GPIO_MOSI 7
  42. #define GPIO_MISO 2
  43. #define GPIO_SCLK 6
  44. #define GPIO_CS 10
  45.  
  46.  
  47.  
  48. spi_device_handle_t Devicehandle;
  49.  
  50. spi_transaction_t init_spi(void)
  51. {
  52.     spi_bus_config_t buscfg={
  53.             .mosi_io_num=GPIO_MOSI,
  54.             .miso_io_num=GPIO_MISO,
  55.             .sclk_io_num=GPIO_SCLK,
  56.             .quadwp_io_num=-1,
  57.             .quadhd_io_num=-1,
  58.  
  59.  
  60.     };
  61.     spi_device_interface_config_t devcfg={
  62.             .command_bits=0,
  63.             .address_bits=0,
  64.             .dummy_bits=0,
  65.             .input_delay_ns=0,
  66.             .clock_speed_hz=2000000,
  67.             .duty_cycle_pos=128,//50% duty cycle
  68.             .mode=3,
  69.             .spics_io_num=GPIO_CS,
  70.             .cs_ena_posttrans=0,
  71.             .queue_size=7
  72.     };
  73.     esp_err_t ret = -1;
  74.     spi_transaction_t trasactionHandle;
  75.     memset(&trasactionHandle, 0, sizeof(trasactionHandle));
  76.     ret=spi_bus_initialize(SENDER_HOST, &buscfg, SPI_DMA_CH_AUTO);
  77.     assert(ret==ESP_OK);
  78.     ret=spi_bus_add_device(SENDER_HOST, &devcfg, &Devicehandle);
  79.     assert(ret==ESP_OK);
  80.     return trasactionHandle;
  81.  }
  82.  
  83.  
  84. uint sendSPIdata(uint8_t cmd, uint8_t data_h, uint8_t data_l, uint8_t chcksum, spi_transaction_t trasactionHandle){
  85.     ESP_LOGI(TAG, "Sending data to  SPI bus");
  86.     int n=0;
  87.     esp_err_t ret = -1;
  88.  
  89.     trasactionHandle.flags = SPI_TRANS_USE_RXDATA | SPI_TRANS_USE_TXDATA;
  90.     trasactionHandle.length = 32;
  91.     trasactionHandle.tx_data[0] = cmd;
  92.     trasactionHandle.tx_data[1] = data_h;
  93.     trasactionHandle.tx_data[2] = data_l;
  94.     trasactionHandle.tx_data[3] = chcksum;
  95.     ret=spi_device_transmit(Devicehandle, &trasactionHandle);
  96.     ESP_LOGI(TAG,"Sent: %d with return %d\n", trasactionHandle.tx_data[0],ret);
  97.     n++;
  98.     return ret;
  99. }
  100.  
  101.  
  102. uint spiWriteCmdData(unsigned char cmd0, uint dat, spi_transaction_t handle){
  103.     unsigned char cksum, cmdb;
  104.     uint send_dat = dat;
  105.     cmdb = (0x3f&cmd0) | 0x80;
  106.     cksum = ~((dat&0x00ff)  +  (dat>>8) + cmdb);
  107.     return sendSPIdata(cmdb,send_dat>>8,send_dat&0x00ff,cksum, handle);
  108. }
  109.  
  110. void spiWRflash(uint addr, uint dat_h, uint dat_l, spi_transaction_t ha){
  111.     //printf("dat_l is %04X, dat_h is %04X address is %04X \n", dat_l,dat_h,addr);
  112.     spiWriteCmdData(0x08,dat_l, ha);
  113.     spiWriteCmdData(0x0A,dat_h,ha);
  114.     spiWriteCmdData(0x0c,addr,ha);
  115. }
  116.  
  117. uint8_t iWriteRegister(uint data, uint16_t regAddress, spi_transaction_t h){
  118.  
  119.     int ret = 0;
  120.     //printf("Writing %04X to %04X\n", data, regAddress);
  121.     spiWRflash(regAddress, (data>>16), data&0xffff, h);
  122.     return ret;
  123.  
  124. }
  125.  
  126. unsigned long readEMregister(unsigned int addr,spi_transaction_t han)
  127. {
  128.     unsigned int dat_l, dat_h;
  129.     //printf("Reading register %04X \n", addr);
  130.     spiWriteCmdData(0x10, addr,han);
  131.     dat_l = spiWriteCmdData(0x12, addr,han);
  132.     dat_h = spiWriteCmdData(0x14, addr,han);
  133.     return (uint32_t)dat_h << 16 | (uint32_t)dat_l;
  134.  
  135. }
  136. void vSetGPIOlevel(gpio_num_t number, int level)
  137. {
  138.     esp_err_t iRetL = ESP_FAIL;
  139.     gpio_reset_pin(number);
  140.     iRetL = gpio_set_direction(number, GPIO_MODE_OUTPUT);
  141.     if (iRetL != ESP_OK){
  142.         ESP_LOGW(TAG, "Cannot set GPIO direction, V9203 mode might be set incorrectly");
  143.     }
  144.     iRetL = gpio_set_level(number, level);
  145.     if (iRetL != ESP_OK){
  146.         ESP_LOGW(TAG, "Cannot set GPIO level, V9203 mode might be set incorrectly");
  147.     }
  148.     ESP_LOGI(TAG, "GPIO %i is set to %i",number, level);
  149. }
  150.  
  151.  
  152. void app_main(void)
  153. {
  154.     esp_err_t ret = nvs_flash_init();
  155.     if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
  156.       ESP_ERROR_CHECK(nvs_flash_erase());
  157.       ret = nvs_flash_init();
  158.     }
  159.     ESP_ERROR_CHECK(ret);
  160.     ESP_LOGI(TAG, "Starting up!");
  161.     //vSetGPIOlevel(GPIO_NUM_18,1);
  162.     //vSetGPIOlevel(GPIO_NUM_19,1);
  163.     spi_transaction_t spitHandler =  init_spi();
  164.     while(1){
  165.     sleep(1);
  166.  
  167.         ret = iWriteRegister(0xDEADBEEF, 0xc001,spitHandler );
  168.         //break;
  169.         ESP_LOGI(TAG, "Program end!");
  170.  
  171.     }
  172.     assert(ret==ESP_OK);
  173. }
GeSHi © Codebox Plus Extension
Need support, is ESP32 C3 not fast enough for my project or something wring in the SPI config

Re: ESP32 C3 delay between SPI transactions

Posted: Sat May 20, 2023 5:21 pm
by username
Can you try these 2 things to see if it helps.

trasactionHandle.flags = 0;
.duty_cycle_pos = 0

Re: ESP32 C3 delay between SPI transactions

Posted: Sun May 21, 2023 1:27 pm
by khu8rt
Thanks for the response, the issue was the esp logs that i was printing before and after each transaction, removing them solved the issue.
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