ESP32 Forum

From the looks of the truth table it is not clear how the system affects the signals of "EN", "IO0" or "IO2". The transistors emitters are connected to opposing Bases but the output (collectors) connect to CHIP_PU and GPIO0. I am assuming GPIO0 maps to IO0 but where do EN and IO2 come into play?

I could use an explanation of how this system is supposed to work.

here is the truth table mentioned, last page, bottom center;
https://dl.espressif.com/dl/SCH_ESP32-S ... 10312C.pdf

The transistors here work as a sort of logic gate: only if the base is high and the emitter is low, the collector is low; in all other cases the collector remains high. You can ignore IO2 in the table; I think it's in there because the table is copied from an ESP32 schematic but pulling down IO2 is not necessary for the ESP32-S3.