ESP32 Forum

Posted: **Sat Dec 11, 2021 12:44 am**

Hi all. I have two SPI devices connected to an ESP32; a micro-SD card and an FGPA. Both work fine, however, because of some timing issues I can clock the SPI signal to the FPGA only at 5 MHz. I want to use the dummy bit workaround as described in the documentation, however, this let me down a rabbit hole. I changed the SPI transaction to the FPGA to SPI_DEVICE_HALFDUPLEX and "abused" the command and address bits for sending data (which is also suggested in the documentation). That code works and I can talk to the FPGA (still at 5 MHz for now; I haven't done the dummy bit yet). Unfortunately, that change has some impact on the communication with the SD card. Once I have made one SPI transaction with the FPGA, I am getting the following errors when trying to access the SD card:

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E (26231) sdmmc_cmd: sdmmc_read_sectors_dma: sdmmc_send_cmd returned 0x107
E (26239) diskio_sdmmc: sdmmc_read_blocks failed (263)

Some more details on my implementation: I am using ESP-IDF 4.2.2. I use HSPI_HOST for both SPI devices. Here is how I initialize the HSPI_HOST:

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  spi_bus = {
        .mosi_io_num = SPI_PIN_NUM_MOSI,
        .miso_io_num = SPI_PIN_NUM_MISO,
        .sclk_io_num = SPI_PIN_NUM_CLK,
        .quadwp_io_num = -1,
        .quadhd_io_num = -1,
        .max_transfer_sz = 4000,
  };
  esp_err_t ret = spi_bus_initialize(HSPI_HOST, &spi_bus, 1);

Here is how I add the FPGA as a SPI device:

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  // Configure SPI device for the Cmod A7
  spi_cmod.address_bits = 0;
  spi_cmod.command_bits = 1 * 8;
  spi_cmod.dummy_bits = 0;
  spi_cmod.mode = 0;
  spi_cmod.duty_cycle_pos = 0;
  spi_cmod.cs_ena_posttrans = 0;
  spi_cmod.cs_ena_pretrans = 0;
  spi_cmod.clock_speed_hz = SPI_SPEED_MHZ * 1000 * 1000;
  spi_cmod.spics_io_num = SPI_PIN_NUM_CS_CMOD;
  spi_cmod.flags = SPI_DEVICE_HALFDUPLEX;
  spi_cmod.queue_size = 1;
  spi_cmod.pre_cb = NULL;
  spi_cmod.post_cb = NULL;
  ret = spi_bus_add_device(HSPI_HOST, &spi_cmod, &spi_cmod_h);

And finally here is how I add the SD card as a SPI device:

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  sdmmc_host_t host = SDSPI_HOST_DEFAULT();
  host.max_freq_khz = SDMMC_FREQ_PROBING;
  sdspi_device_config_t slot_config = SDSPI_DEVICE_CONFIG_DEFAULT();
  slot_config.gpio_cs = SPI_CS;
  slot_config.host_id = HSPI_HOST;
  esp_err_t ret = VFS::esp_vfs_fat_sdspi_mount(mount, &host, &slot_config, &mount_config, &card);

Here are the GPIO pins used: MISO (22), MOSI (21), SCK (25), CS_FPGA (26), CS_SD (23).

Well, I'm at the end of my wits. Hopefully someone can point me in the right direction. I've attached the log as well.

TIA,
AP

Posted: **Thu Dec 16, 2021 9:38 pm**

So, after some more digging it appears that my problem is the same as the one described here: https://www.esp32.com/viewtopic.php?t=13719

What I wasn't explicit about in my original post: everything worked fine when I used full-duplex connections to both SPI devices. Things started to break once I switched one SPI device to half-duplex. After sending a transaction to the half-duplex device, it seems to mess up the SPI configuration to the SD card. At this point I'm inclined to believe that this might be a bug in ESP-IDF.

AP

ESP32 Forum

Issue with two SPI devices on same bus

Issue with two SPI devices on same bus

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