OpenOCD Install for Windows

aaquilina
Posts: 43
Joined: Fri Jan 20, 2017 3:10 pm

OpenOCD Install for Windows

Postby aaquilina » Thu Apr 27, 2017 4:08 pm

Can anyone give step-by-step instructions to install openocd on windows please? Currently I'm cloning the git repository to my home directory for msys2 but I can't seem to understand the instructions given in the readme.windows (nor the readme).

aaquilina
Posts: 43
Joined: Fri Jan 20, 2017 3:10 pm

Re: OpenOCD Install for Windows

Postby aaquilina » Fri Apr 28, 2017 9:34 am

So for anyone that has a similar issue, here's what I did to build openocd after having installed msys2. Please bear in mind that this has been a trial and error process for me, so I'm probably missing something:

Clone the esp-32 openocd from https://github.com/espressif/openocd-esp32 using:

Code: Select all

git clone --recursive https://github.com/espressif/openocd-esp32 
Update the msys packages using:

Code: Select all

pacman -Syuu
I read somewhere that each time you run this command, you should close and reopen msys until there are no further updates.

Then I ran:

Code: Select all

pacman -S --needed base-devel mingw-w64-i686-toolchain mingw-w64-x86_64-toolchain \
Which downloaded the libtoolize package needed for boot strap
I then:

Code: Select all

cd /openocd-esp32
and

Code: Select all

./bootstrap
I'll update when I manage the next few steps.

EDIT: Just came across this post by @ESP_Angus viewtopic.php?f=2&t=184&p=1145&hilit=co ... nocd#p1145

f.h-f.s.
Posts: 215
Joined: Thu Dec 08, 2016 2:53 pm

Re: OpenOCD Install for Windows

Postby f.h-f.s. » Sun Apr 30, 2017 7:18 pm

Maybe a little late, I found that exact same post too.
And this one also helped. https://www.matthias-jentsch.de/2017/02 ... d-openocd/

aaquilina
Posts: 43
Joined: Fri Jan 20, 2017 3:10 pm

Re: OpenOCD Install for Windows

Postby aaquilina » Tue May 02, 2017 6:27 am

Thanks. Did you manage to get it running? I've been following this post viewtopic.php?f=13&t=336&p=8134&hilit=e ... nocd#p8134 but I'm stuck in the following step
You will want the CDT Build of Eclipse NEON

https://eclipse.org/cdt/

Once you have installed it, you need the GNU ARM toolkit.
However, before you can install it you will need to modify the security settings of your JVM. You will get this error:
http://gnuarmeclipse.github.io/blog/201 ... all-issue/

Download these 3 files:
http://www.oracle.com/technetwork/java/ ... 33166.html
(2 .jars and a readme)

Look for a directory lib/security under your Java Home directory. Depending oin where and how your JVM executes it may appear in a number of different places.
EDIT: Proceeded further and got everything set up. The only thing now is i get this console output from OpenOCD. Has anyone encountered it?

Code: Select all

Open On-Chip Debugger 0.10.0-dev-g372bb59b-dirty (2017-04-28-14:44)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
adapter speed: 3000 kHz
force hard breakpoints
Started by GNU ARM Eclipse
Info : clock speed 3000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32.cpu0: Target halted, pc=0x40000400
Info : esp32.cpu1: Target halted, pc=0x40000400
Info : accepting 'gdb' connection on tcp/3333
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32.cpu0: Core was reset (pwrstat=0x1F, after clear 0x0F).
Info : esp32.cpu0: Target halted, pc=0x40000400
esp32.cpu0: target state: halted
Info : esp32.cpu1: Core was reset (pwrstat=0x1F, after clear 0x0F).
Info : esp32.cpu1: Target halted, pc=0x40000400
esp32.cpu1: target state: halted
invalid command name "arm"
Info : Auto-detected RTOS: FreeRTOS
Error: esp32.cpu0: xtensa_write_memory (line 845): DSR (81A0CC13) indicates DIR instruction generated an exception!
Warn : esp32.cpu0: Failed writing 4096 bytes at address 0x3F400010
Error: esp32.cpu0: xtensa_write_memory (line 845): DSR (81A0CC13) indicates DIR instruction generated an exception!
Warn : esp32.cpu0: Failed writing 4096 bytes at address 0x3F401010
Info : dropped 'gdb' connection

ESP_Sprite
Posts: 9730
Joined: Thu Nov 26, 2015 4:08 am

Re: OpenOCD Install for Windows

Postby ESP_Sprite » Wed May 03, 2017 1:46 am

Do you happen to configure the JTAG GPIOs to something else in your program? DIR errors usually only occur because something goes wrong with the physical signal levels.

aaquilina
Posts: 43
Joined: Fri Jan 20, 2017 3:10 pm

Re: OpenOCD Install for Windows

Postby aaquilina » Wed May 03, 2017 6:56 am

They shouldn't be, because I'm using the exact same pins with VisualGDB JTAG debugging and it works fine. The only issue with continuing to use VisualGDB is that its not yet in sync with the latest ESP-IDF 2.0. If anyone's interested I've screenshot my settings from the GDB OpenOCD Debugging config in Eclipse as well as the code in esp32.cfg.

Image
Image
Image

Code: Select all

#
# Example configuration file to hook up an ESP32 module or board to a JTAG 
# adapter. Please modify this file to your local setup.
#
#


# Include the configuration for the JTAG adapter. We use the Tian TUMPA here.
# If you have a different interface, please edit this to include the 
# configuration file of yours.
source [find interface/ftdi/um232h.cfg]

# The ESP32 only supports JTAG.
transport select jtag

# The speed of the JTAG interface, in KHz. If you get DSR/DIR errors (and they
# do not relate to OpenOCD trying to read from a memory range without physical
# memory being present there), you can try lowering this.
adapter_khz 3000

# With no variables set, openocd will configure JTAG for the two cores of the ESP32 and
# will do automatic RTOS detection. This can be be adjusted by uncommenting any of the
# following lines:

# Only configure the PRO CPU
#set ESP32_ONLYCPU 1
# Only configure the APP CPU
#set ESP32_ONLYCPU 2
# Disable RTOS support
#set ESP32_RTOS none
# Force RTOS to be FreeRTOS
#set ESP32_RTOS FreeRTOS

#Source the ESP32 configuration file
source [find target/esp32.cfg]


# The TDI pin of ESP32 is also a bootstrap pin that selects the voltage the SPI flash
# chip runs at. When a hard reset happens (e.g. because someone switches the board off
# and on) the ESP32 will use the current TDI value as the bootstrap value because the
# JTAG adapter overrides the pull-up or pull-down resistor that is supposed to do the
# bootstrapping. These lines basically set the idle value of the TDO line to a 
# specified value, therefore reducing the chance of a bad bootup due to a bad flash
# voltage greatly.

# Enable this for 1.8V SPI flash
#esp108 flashbootstrap 1.8
# Enable this for 3.3V SPI flash
esp108 flashbootstrap 3.3



Samishkakumble
Posts: 1
Joined: Tue Apr 30, 2019 5:34 am

Re: OpenOCD Install for Windows

Postby Samishkakumble » Tue Apr 30, 2019 5:38 am

Excellent thraed! I got valuable information here. Thank you!

Who is online

Users browsing this forum: No registered users and 78 guests