Strapping pins and SDIO slave timing
Posted: Tue Aug 18, 2020 4:34 am
I have a question regarding the MTDO and GPIO5 strapping pins. The manual says they both default to pull-up, which corresponds to rising-edge sampling and rising-edge output I think. There is also a note saying firmware can configure register bits to change the settings after booting.
The reason I'm trying to understand the timing is that I'm using GPIO5 as an input so potentially it could read LOW on power up. This sets timing to put the timing into rising-edge sampling and falling-edge output. Will this potential change mess up my FLASH and SPIRAM access? If these can be configure after booting, then can I set the timing to rising output? How do I do that? I'm potentially looking at changing the pin but I've got over a hundred boards printed so I'd like to try a software fix instead of cutting traces.
Thank you!
BTW, I have one board that is having SPIRAM issues. I wonder if that strapping pin SDIO timing caused it. I measured both pins to be high but that might to too late since the strapping pins only change state after power down? Very confused.
The reason I'm trying to understand the timing is that I'm using GPIO5 as an input so potentially it could read LOW on power up. This sets timing to put the timing into rising-edge sampling and falling-edge output. Will this potential change mess up my FLASH and SPIRAM access? If these can be configure after booting, then can I set the timing to rising output? How do I do that? I'm potentially looking at changing the pin but I've got over a hundred boards printed so I'd like to try a software fix instead of cutting traces.
Thank you!
BTW, I have one board that is having SPIRAM issues. I wonder if that strapping pin SDIO timing caused it. I measured both pins to be high but that might to too late since the strapping pins only change state after power down? Very confused.