ESP32 Forum

Hi,

Timers are clocked by APB_CLK, and the technical reference manual says that APB_CLK is derived by the CPU_CLK source, and gives a table about the relation. What is the proper way of determining the APB_CLK frequency on the fly? It looks like, though I am not sure, the APB_CLK is ticking with 40 MHz after deep sleep when the deep sleep stub is running, but than it is changing to 80 MHz. I would like to determine this on the fly in order to get reliable timing counts in seconds from the timers.

Best.

Whenever software changes APB frequency, it stores the new value into RTC_APB_FREQ_REG (that's one of the general purpose retention registers). There is a function which gets APB frequency value from this register in rtc_clk.c:
In the deep sleep wake stub, you can probably access RTC_APB_FREQ_REG directly or just assume the 40 MHz frequency.

Thank you. It worked. Though, I couldn't find RTC_APB_FREQ_REG definition in the SDK files, found it somewhere in a git repo which defines it as RTC_CNTL_STORE5_REG. So,
yielded the answer. It turns out that the APB is ticking with 39997440 Hz in the deep sleep stub, vs 79998976 Hz in the user code. That is
64 usec and 13 usec difference every second if 40 MHz and 80 MHz is assumed. I didn't check the specs but 13-64 ppm may be important.

I assumed the correct values are 39997440 Hz and 79998976 Hz, and used the above code line directly where ever they are needed.

Kind regards.

The correct values are 40 (actually, the crystal frequency) and 80MHz, the values read from the store register loose precision due to rounding. I suppose that rounding to the nearest MHz is the best approach since we can't change the format used to store this value.

To me worked: