ESP32 Forum

Using v4.1-beta1-317-g84b51781c with rev 1 ESP32

Following an ESP_EN reboot esp_reset_reason() returns 7, ESP_RST_WDT, //!< Reset due to other watchdogs)
On a different board where I have access to the console then following UART reprogramming I get 1, ESP_RST_POWERON, //!< Reset due to power-on event

Both results are unexpected. Does the reset reason work?

EDIT: I am looking establish if power has been removed rather than watchdog reset. I have a voltage supervisor which toggles ESP_EN. I also have a watchdog circuit which toggles ESP_EN and so as I think about it the esp_reset_reason() probably will not tell the difference between real power loss & ESP_EN watchdog and supervisor reset?

From what I know, the way ESP_EN works is to effectively forcefully power the ESP32 down, so the reason you'll get is a ESP_RST_POWERON reason. Depending on the flash you have and the ECO of your chip, you may have a situation where the first boot fails because flash isn't ready yet, generating the ESP_RST_WDT reset reason. I don't think that (without changing the hardware) there is a way to figure out the external watchdog monitor reset you.

Thanks.

From what I know, the way ESP_EN works is to effectively forcefully power the ESP32 down, so the reason you'll get is a ESP_RST_POWERON reason

Is there RAM in which I can store/preserve values between boot/resets?

Depending on the flash you have and the ECO of your chip, you may have a situation where the first boot fails because flash isn't ready yet, generating the ESP_RST_WDT reset reason.

ECO? How do I confirm that the flash inititialisation is the issue?
I thought that the Flash boot errata had been fixed with revision 1 ESP?

PeterR wrote: ↑

Tue Jul 14, 2020 11:15 am

ECO?

Engineering Change Order. The official term for 'revision'.

Code: Select all

esp_chip_info(&chip_info) gives .revision = 1
I (1428) cpu_start: Pro cpu start user code
I (1454) spi_flash: detected chip: gd

How do I confirm that the flash inititialisation is the issue?
I thought that the Flash boot errata had been fixed with revision 1 ESP?

Sounds like an ECO1 indeed. You should be able to conform a flash boot error from the serial output: you would see the chip trying to boot from flash, failing, the WDT catching it and it succeeding to boot from flash,.