Demystify external flash MMU and Cache
Posted: Thu Jun 18, 2020 4:01 pm
Hi,
I am currently reading through the ESP32 Reference Manual on the External Memory section. So, here is stated that ESP32 can access external SPI flash and SPI SRAM as external memory. Also the table of Address mapping (External memory) is shown. The next part is saying that 'When a CPU accesses external memory through the Cache and MMU, the cache will map the CPU’s address to an
external physical memory address (in the external memory’s address space), according to the MMU settings. Due
to this address mapping, the ESP32 can address up to 16 MB External Flash and 8 MB External SRAM.'.
Looking in the MMU section from the Reference Manual I found that there is a Cache MMU, that can map pages of flash from the physical address space into virtual memory address space for each PID and CPU CORE source.
So, in order to use the SPI flash I need to populate Cache MMU entries or can I bypass the MMU and use the raw physical address space ?
Now looking through code, I find two API's that I can't really comprehend, so there it is:
- spi_flash_map(): maps a region of physical flash addresses into instruction space or data space of the CPU.
- cache_flash_mmu_set(): which is used in the bootloader code
What's the difference between those two ? Is spi_flash_map not using the Cache ? Looked in the Cache section and found that I can use the SRAM0 as cache for external memory, can I use the external memory without cache, why the External Memory MMU is called Cache MMU ?
It's really confusing, I would appreciate if someone could explain to me a little about how things actually works . Maybe you can point me where I can read about it.
Thanks
I am currently reading through the ESP32 Reference Manual on the External Memory section. So, here is stated that ESP32 can access external SPI flash and SPI SRAM as external memory. Also the table of Address mapping (External memory) is shown. The next part is saying that 'When a CPU accesses external memory through the Cache and MMU, the cache will map the CPU’s address to an
external physical memory address (in the external memory’s address space), according to the MMU settings. Due
to this address mapping, the ESP32 can address up to 16 MB External Flash and 8 MB External SRAM.'.
Looking in the MMU section from the Reference Manual I found that there is a Cache MMU, that can map pages of flash from the physical address space into virtual memory address space for each PID and CPU CORE source.
So, in order to use the SPI flash I need to populate Cache MMU entries or can I bypass the MMU and use the raw physical address space ?
Now looking through code, I find two API's that I can't really comprehend, so there it is:
- spi_flash_map(): maps a region of physical flash addresses into instruction space or data space of the CPU.
- cache_flash_mmu_set(): which is used in the bootloader code
What's the difference between those two ? Is spi_flash_map not using the Cache ? Looked in the Cache section and found that I can use the SRAM0 as cache for external memory, can I use the external memory without cache, why the External Memory MMU is called Cache MMU ?
It's really confusing, I would appreciate if someone could explain to me a little about how things actually works . Maybe you can point me where I can read about it.
Thanks