QSPI masters of ESP-WROVER-32

[sunny9hung]

I have a question related to Quad SPI of ESP-WROVER-32, which I couldn't be sure of the answer after quick search in forum, datasheet and TRM.

- Does ESP32 allow concurrent use of separate QSPI masters (with separate data bus) among SPI1/SPI2/SPI3?

More info:
From what I know in the TRM (1.) all SPI1/SPI2/SP3 individually support QSPI master, and (2.) there is an example of parallel QSPI of ESP32 with 1 flash and 1 SRAM sharing the same data buses with different CSx pins.
I suppose (2.) is the case in ESP32-WROVER-32, and I want to externally driver another QSPI slave without disturbing the QSPI master channel within module.