waveform generation problem
Posted: Thu May 21, 2020 5:19 am
I am currently testing the ESP32 waveform generator. I observe strong artefacts on DAC channel 1 for high frequencies. Do I do something wrong or is there a bug in the ESP32? I use the following program
Code: Select all
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/queue.h"
#include "soc/rtc_io_reg.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/sens_reg.h"
#include "soc/rtc.h"
#include "driver/dac.h"
/*
* Generate a sine waveform on both DAC channels:
*
* DAC_CHANNEL_1 - GPIO25
* DAC_CHANNEL_2 - GPIO26
*
* Connect scope to both GPIO25 and GPIO26
* to observe the waveform changes
* in response to the parameter change
*/
void app_main(){
REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_DIV_SEL, 7 );
SET_PERI_REG_MASK(SENS_SAR_DAC_CTRL1_REG, SENS_SW_TONE_EN);
SET_PERI_REG_MASK(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_CW_EN1_M);
SET_PERI_REG_MASK(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_CW_EN2_M);
int scale=0 ;
SET_PERI_REG_BITS(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_SCALE1, scale, SENS_DAC_SCALE1_S);
SET_PERI_REG_BITS(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_SCALE2, scale, SENS_DAC_SCALE2_S);
int invert=2 ;
SET_PERI_REG_BITS(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_INV1, invert, SENS_DAC_INV1_S);
SET_PERI_REG_BITS(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_INV2, invert, SENS_DAC_INV2_S);
int frequency_step=0x1000 ;
SET_PERI_REG_BITS(SENS_SAR_DAC_CTRL1_REG, SENS_SW_FSTEP, frequency_step, SENS_SW_FSTEP_S);
dac_output_enable(DAC_CHANNEL_1); // bad waveform
dac_output_enable(DAC_CHANNEL_2);
}