No clk output for HSPI

frank_he
Posts: 7
Joined: Wed Apr 08, 2020 5:41 am

No clk output for HSPI

Postby frank_he » Sun Apr 26, 2020 6:33 am

Hi,
i'm trying to use the HSPI to communication with my slave spi device, GPIO12~15 is used for the HSPI interafce. But i can't capture any clk output with logic analyzer. Can anybody have a look at this.
lgw_spi_open() // this is for HSPI init
{
gpio_pad_select_gpio(CS_PIN);
gpio_set_direction(CS_PIN, GPIO_MODE_OUTPUT);
PIN_FUNC_SELECT(IO_MUX_GPIO12_REG, FUNC_MTDI_HSPIQ); // Pin MTDI --> function 1: HSPI MISO (GPIO12)
PIN_FUNC_SELECT(IO_MUX_GPIO13_REG, FUNC_MTCK_HSPID); // Pin MTCK --> function 1: HSPI MOSI (GPIO13)
PIN_FUNC_SELECT(IO_MUX_GPIO14_REG, FUNC_MTMS_HSPICLK); // Pin MTMS --> function 1: HSPI SCLK (GPIO14)
PIN_FUNC_SELECT(IO_MUX_GPIO15_REG, FUNC_MTDO_GPIO15);

//Clear this bit
CLEAR_PERI_REG_MASK(SPI_CLOCK_REG(SPI_NUM_HSPI), SPI_CLK_EQU_SYSCLK);
// Clear CTRL register (disables "fast-read" mode)
WRITE_PERI_REG(SPI_CTRL_REG(SPI_NUM_HSPI), 0);

WRITE_PERI_REG(SPI_CLOCK_REG(SPI_NUM_HSPI),
((0x01 & SPI_CLKDIV_PRE) << SPI_CLKDIV_PRE_S) // Pre-divide by 2 --> 40MHz
| ((0x04 & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) // Further divide by 5 --> 8MHz
| ((0x01 & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) // = ((SPI_CLKCNT_N+1)/2)-1
| ((0x04 & SPI_CLKCNT_L) << SPI_CLKCNT_L_S)); // = SPI_CLKCNT_N
WRITE_PERI_REG(SPI_USER_REG(SPI_NUM_HSPI),
SPI_CK_I_EDGE // Slave edge rising
| SPI_USR_MOSI // Enable data-out phase
| SPI_DOUTDIN); // Full-duplex (also do data-in during data-out)
WRITE_PERI_REG(SPI_CTRL1_REG(SPI_NUM_HSPI), 0); // Clear CTRL1 register
}

and for SPI register read is like
lgw_spi_read(int len)
{
gpio_set_level(CS_PIN,0);
int i, words = (len + 3) / 4;
WRITE_PERI_REG(SPI_MOSI_DLEN_REG(SPI_NUM_HSPI),
((len * 8 - 1) << SPI_USR_MOSI_DBITLEN_S)); // bit count out
//| ((len * 8 - 1) << SPI_USR_MOSI_DBITLEN_S)); // bit count in - XXX do we need this for full duplex?
for (i = 0; i < words; i++) {
WRITE_PERI_REG(SPI_Wx(SPI_NUM_HSPI, i), spibuf.words);
}

SET_PERI_REG_MASK(SPI_CMD_REG(SPI_NUM_HSPI), SPI_USR);

// Busy wait (64B @ 8Mbps --> 64us max)
while ((READ_PERI_REG(SPI_CMD_REG(SPI_NUM_HSPI)) & SPI_USR) != 0);
wait_ms(10); // XXX - not sure yet why this is necessary

for (i = 0; i < words; i++) {
spibuf.words = READ_PERI_REG(SPI_Wx(SPI_NUM_HSPI, i));
}
gpio_set_level(CS_PIN,1);
}

I have two spi register read process and i can see the low signal for CS_PIN for this two read process, but no clk signal.

Does somebody know why?

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