ESP32 Forum

Posted: **Wed Feb 22, 2017 7:46 am**

when spi master clock is 10Mhz the recv data is right:

Send vs recv:
1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e <sent
1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e <recv

but spi master clock change to 20Mhz the recv data is wrong:

Code: Select all

Send vs recv:
1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e <sent
0 81 1 82 2 83 3 84 4 85 5 86 6 87 7 88 8 89 9 8a a 8b b 8c c 8d d 8e e 8f <recv

somebody can supply solution?

Posted: **Wed Feb 22, 2017 9:13 am**

Is your SDK up to date? There was a bug with spi clock before. Also I think there is a pending pull request for spi.

Posted: **Thu Feb 23, 2017 8:02 am**

I have updated my SDK,but issue still exist, can you tell me what bug with "There was a bug with spi clock before"?
At the moment I found that DMA can not be sent and transmitted at the same time.

Posted: **Sun Feb 26, 2017 6:50 am**

Fyi, we're working on this: there's a merge in the queue that fixes the 20MHz mode. 40MHz was also broken in some cases; that seems to be more of a HW issue and we're waiting for the digital guys to have a look at that. If you can't wait and need 20MHz to work right now: I think a workaround was mentioned here: https://github.com/espressif/esp-idf/issues/363

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