ESP32 Forum

Hi, I have been trying to get the AT Command Processor working with the sparkfun thing. Everything complies ok, and seems to flash ok, but I get an error from the serial terminal after a reset (see below). There is no response to <CR> or AT<CR> from the terminal. I have tried the Esp Idf current release and the latest 2.0 prelim.


ets Jun 8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0x00
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0008,len:8
load:0x3fff0010,len:3376
load:0x40078000,len:7504
load:0x40080000,len:252
entry 0x40080034
I (28) boot: ESP-IDF v2.0-rc1 2nd stage bootloader
I (28) boot: compile time 17:54:50
I (63) boot: Enabling RNG early entropy source...
I (63) boot: SPI Speed : 40MHz
I (63) boot: SPI Mode : DIO
I (76) boot: SPI Flash Size : 4MB
I (89) boot: Partition Table:
I (100) boot: ## Label Usage Type ST Offset Length
I (123) boot: 0 phy_init RF data 01 01 0000f000 00001000
I (146) boot: 1 ota_0 OTA app 00 10 00010000 000ea000
I (169) boot: 2 nvs WiFi data 01 02 000fa000 00016000
I (192) boot: 3 ota_1 OTA app 00 11 00110000 000ea000
I (215) boot: 4 otadata OTA data 01 00 001fd000 00003000
I (239) boot: End of partition table
I (252) boot: Disabling RNG early entropy source...
I (269) boot: Loading app partition at offset 00010000
I (1412) boot: segment 0: paddr=0x00010018 vaddr=0x00000000 size=0x0ffe8 ( 65512)
I (1413) boot: segment 1: paddr=0x00020008 vaddr=0x3f400010 size=0x19630 (103984) map
I (1429) boot: segment 2: paddr=0x00039640 vaddr=0x3ffb0000 size=0x020ec ( 8428) load
I (1459) boot: segment 3: paddr=0x0003b734 vaddr=0x40080000 size=0x00400 ( 1024) load
I (1483) boot: segment 4: paddr=0x0003bb3c vaddr=0x40080400 size=0x1d0e8 (119016) load
I (1565) boot: segment 5: paddr=0x00058c2c vaddr=0x400c0000 size=0x00034 ( 52) load
I (1566) boot: segment 6: paddr=0x00058c68 vaddr=0x00000000 size=0x073a0 ( 29600)
I (1583) boot: segment 7: paddr=0x00060010 vaddr=0x400d0018 size=0x74a7c (477820) map
I (1610) heap_alloc_caps: Initializing. RAM available for dynamic allocation:
I (1633) heap_alloc_caps: At 3FFBA650 len 000259B0 (150 KiB): DRAM
I (1654) heap_alloc_caps: At 3FFE8000 len 00018000 (96 KiB): D/IRAM
I (1675) heap_alloc_caps: At 4009D4E8 len 00002B18 (10 KiB): IRAM
I (1696) cpu_start: Pro cpu up.
I (1708) cpu_start: Single core mode
I (1721) cpu_start: Pro cpu start user code
E (2101) phy_init: PHY data partition validated
I (2263) phy: phy_version: 258, Nov 29 2016, 15:51:07, 1, 0
I (2425) cpu_start: Starting scheduler on PRO CPU.
E (2428) uart: uart_wait_tx_done(703): uart driver error
I (2428) uart: queue free spaces: 10
heap:224208
E (2433) wifi: esp_wifi_set_storage 1218 wifi is not init
I (2439) wifi: frc2_timer_task_hdl:3ffc44d4, prio:22, stack:2048
I (2448) wifi: Init lldesc rx mblock:25
I (2448) wifi: Init lldesc rx ampdu len mblock:7
I (2452) wifi: Init lldesc rx ampdu entry mblock:4
I (2457) wifi: pp_task_hdl : 3ffd12e4, prio:23, stack:8192
I (2462) wifi: mode : softAP (24:0a:c4:00:97:25)
I (2469) wifi: mode : sta (24:0a:c4:00:97:24) + softAP (24:0a:c4:00:97:25)
I (2474) wifi: mode : softAP (24:0a:c4:00:97:25)


Any ideas?

Well you have to configure the UART in menuconfig. It never prints "ready" on your console. But even after ready prompt I was not able to get it to respond to input, though it does echo the chars.

Maybe it's a line ending thing. I haven't got any experience with the ESP32 AT thing, but if I recall correctly the ESP8266 one had to have cr/lf as a line ending. If you only give it one of the two, it won't parse it as an enter.

I see in another thread :

"Fyi: the AT binary isn't available yet because it isn't production-ready. The current AT firmware is compiled with a non-production version of ESP-IDF; apart from that there's also a bug related to AT+RESTORE that we need to fix. We'll edit the git repo to kill the non-working download link for now; expect a binary somewhere after we release ESP-IDF 2.0."

It sounds like it's not supported yet...

run make menuconfig
go to Partation Table and select "Single factory app, no OTA"
this solved the problem for me

perhabs this helps:
( example windows hterm )

be shure you use CR + LF
result: used in this example uart1 ( 16, 17 ) for AT Terminal

(edit)
DevKitC and FTDI 232 for UART1
http://esp32.com/viewtopic.php?f=2&t=1103&p=5041#p5039
(/edit)

best wishes
rudi

jdBethel wrote:
Hi, I have been trying to get the AT Command Processor working with the sparkfun thing. Everything complies ok, and seems to flash ok, but I get an error from the serial terminal after a reset (see below). There is no response to <CR> or AT<CR> from the terminal. I have tried the Esp Idf current release and the latest 2.0 prelim.

...
.

Any ideas?

hi
+try to use the same uart like you flash
example DevKitC uart0

change in sdkconfig ( make menuconfig )
component AT uart1 to uart0
here you see the example on config in menuconfig
uart port = 0
rx pin 3
tx pin 1


http://esp32.com/viewtopic.php?f=2&t=1103&p=5054#p5054

then start
make flash monitor
and you usually get the boot prozess
then the "ready" from AT prozessor
and then you can write AT Commands in monitor

hope this helps

best wishes
rudi

Yay! That worked - Remapped to UART0 and the mentioned pins. Thank you