SPI Latency
Posted: Wed May 15, 2019 9:08 am
I'm using the SPI to communicate with 5 quad channel DACs connected as shown in the diagram. On a timer interrupt I write to all the DAC channels with successive spi_device_polling_transmits. This is required to latch the data into the DAC registers with the CS line. What I need to to is reduce the latency between the initial interrupt and the latency between each polling transmit. Is this possible?
Alternatively is there a way to toggle the CS single within a polling transmit?
Couple of code snippets:
From interrupt:
From SpiTask:
Alternatively is there a way to toggle the CS single within a polling transmit?
Couple of code snippets:
From interrupt:
Code: Select all
xTaskNotifyFromISR( xHandlingTask, ulStatusRegister, eSetBits, &xHigherPriorityTaskWoken);
portYIELD_FROM_ISR();
Code: Select all
void SpiTask(void *pvParameters)
{
uint32_t ulInterruptStatus;
while(1){
xTaskNotifyWait( 0x00, ULONG_MAX, &ulInterruptStatus, portMAX_DELAY );
if((spiSendNow == 1) && (dataReady == 1)){
gpio_set_level(GPIO_NUM_15, 1);
spi_device_polling_transmit(spi, &transA[bufferIndex]);
spi_device_polling_transmit(spi, &transB[bufferIndex]);
spi_device_polling_transmit(spi, &transC[bufferIndex]);
spi_device_polling_transmit(spi, &transD[bufferIndex]);
spiSendNow = 0;
bufferIndex++;
if(bufferIndex >= BUFFER_SIZE) bufferIndex = 0;
gpio_set_level(GPIO_NUM_15, 0);
}
}
}