Hello everyone!
I read in Xtensa ISA https://0x04.net/~mwk/doc/xtensa.pdf chapter 1.1.1 that the Xtensa core is configurable by a brand manufacturers. As far I understand, Espressif is one of such core customers and I'd like to know - does ESP32 ISA contain any Huffman encoding instruction to accelerate this on HW level?
Thanks!
Huffman encoding HW acceleration feature
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Re: Huffman encoding HW acceleration feature
Not specifically, sorry. Can I ask why you would need this, and what specific instructions you're looking for?
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Re: Huffman encoding HW acceleration feature
Thanks for the reply!
I need to form and transfer data that potentially could be compressed very tight what would reduce memory usage and traffic load. My app needs more memory for packing data that coming fast, it uses 2 cores and it would be great if I could use HW accelerated features for data comression. I am surveying for ways of optimisation now and this leaded me to this question.
I need to form and transfer data that potentially could be compressed very tight what would reduce memory usage and traffic load. My app needs more memory for packing data that coming fast, it uses 2 cores and it would be great if I could use HW accelerated features for data comression. I am surveying for ways of optimisation now and this leaded me to this question.
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