Small ESP32 Modul ( all include in new ESP32-PICO )

[dmaxben]

Great! Nice to see an 8MB version of the Pico....

[ifranzki]

thanks for updating

revised_v1.0_31.08.2017.png

ESP32-PICO-D4 datasheet V1.0 from 31. August 2017
esp32-pico-d4_datasheet_en_V1.0_vom_31.08.2017.pdf

src now online again

best wishes
rudi

Hi, rudi,
I must say you did a great job here.
So, an External PSRAM work with these two chips.
- D2WD
- PICO
Can you tell me what PSRAM you tested? And where to buy them if you know?
It is pity that espressif didn't put a PSRAM in PICO.
Thank you very much.

update Aug 15 / 2020

Hi

know this psram on pico thread is 3 years old - but there are news:
FYI: ESP32-Pico-V3-02 is with PSRAM

best wishes
rudi

Hi rudi,

in your PSRAM wiring in https://www.esp32.com/viewtopic.php?f=2 ... 100#p33336 is there a reason why you did not use FCLK (i.e. IO6) for SCLK, but IO10? As I read the doc, SPI-Flash and SPRAM shares the CLK line, so IO6....

Also, did you try to use SPRAM with ESP32-PICO-Kit V4.1 and the esp-idf from the current master recently? Looks like they have changed the PSRAM pin assignments in an incompatible way.....

Kind regards, Ingo

[rudi ;-)]

Hi rudi,

in your PSRAM wiring in https://www.esp32.com/viewtopic.php?f=2 ... 100#p33336 is there a reason why you did not use FCLK (i.e. IO6) for SCLK, but IO10? As I read the doc, SPI-Flash and SPRAM shares the CLK line, so IO6....

Also, did you try to use SPRAM with ESP32-PICO-Kit V4.1 and the esp-idf from the current master recently? Looks like they have changed the PSRAM pin assignments in an incompatible way.....

Kind regards, Ingo

Hi Ingo

"Apologise for answering this late, somehow BBS refuses to send me emails for notifications on this reply."

PSRAM works fine with PICO D4 also with the Kit V4.1, i have no problem with the used ESP-IDF.
Which IDF Version you use?

Also the Pico V3 and the V3-02 works fine, but you must do few code lines in the ESP-IDF.
If you want use the embedded PSRAM parallel to an extern PSRAM you have do few lines more -
it works very fine - and better then the D4 cause we have all feature from ESP32-V3 ECO ect -
and you can drive an extra Flash - no jumbo-mumbo - very easy code lines.

i am working just in time on making an engineering PCB with ESP32-PICO-V3 and ESP32-Pico-V3-02
before chin. spring festival comes,
cause i got a brand new 64Mbit PSRAM from my inhouse friends,
which is smaller as the usually lyontek SOIC-150 mil and is so tiny so i can use also 01005 parts which makes sense to use it now
only this PICO is very very big then, you see from the new PSRAM package only a likewise little smaller as 0805 Package.
i got this PSRAM package this day and i will use it also for my Stickley Projects and the PSRAMBANK project on USB Stick.
This was the reason to review this post to make the news available.

edit: i forget, i got also a SPI Flash with near 0805 size - so it makes sense to use it as an extra flash.
i will try µPython after i got the HW ( PCB ) - i think it comes next week and i can update my thread again.

BTW, you know the PSRAMBANK Project for the PicoKit ?
[other post]
You put a PicoKit - example 4.1 on it and you have 8x64Mbit PSRAM.
Few lines of code you must insert the ESP-IDF ( PSRAMBANK Component ready to go ) and a header in your project with one or two define's for used KIT Version / PICO version. Now you have 8*64Mbit PSRAM for malloc and further things.

Perhabs you should ask the Espressif Team - ( ESP_Sprite example ) they are specialist -
perhabs they can answere this to you more detailed as i am do, or can,
sry - i am only a "hobbiest" usually the "home gardener" -
i am not an "espressifer" or a "maker" only a "simply user"



email me if you need help or DM me over my twitter.

[WiFive]

in your PSRAM wiring in https://www.esp32.com/viewtopic.php?f=2 ... 100#p33336 is there a reason why you did not use FCLK (i.e. IO6) for SCLK, but IO10? As I read the doc, SPI-Flash and SPRAM shares the CLK line, so IO6....

Old psram chips could not share clock line

[ifranzki]

Hi rudy,

Which IDF Version you use?

I use pretty much latest from master (i.e. last commit was from Jan 5, 2021).

The code looks like it is supporting PSRAM for the PICO KIT, as far as I can tell. The code changed a lot since they initially added support for PSRAM, now the pin assignments are read from the eFuse, except the one for PSRAM CS, which can be configured via 'idf.py menuconfig'.

Perhabs you should ask the Espressif Team - ( ESP_Sprite example ) they are specialist -
perhabs they can answere this to you more detailed as i am do, or can,
sry - i am only a "hobbiest" usually the "home gardener" -
i am not an "espressifer" or a "maker" only a "simply user"

I am also just a hobbiest...

I did open an issue on Github to describe my attempts to use PSRAM, see https://github.com/espressif/esp-idf/issues/6350
Unfortunately not too much progress, although I tried lost of things (see the issue).

It seems to be able to access the PSRAM, but the memory test fails with some kind of repeating patterns.
Maybe you can take a look at the issue and let me know if there is anything that catches your eyes. I am quite sure that I am doing something wrong, but what ?

What really wonders me is that CLK line (FCLK - IO6) only goes up to about 1.8 volts, where all the other signals go up to 3.3 volts, as I would expect. From the strapping pins, especially IO12/MTDI, it correctly sets the voltage to 3.3V. I wonder if this is causing the memory test errors, due to skipped clock pulses? I also tried to use a different pin for PSRAM CLK, but this shows the exact same effect, and the same memory test errors.

Kind regards,
Ingo

[ifranzki]

FYI, this is how I mounted the PSRAM to the PICO Kit:

Snap_009.jpg (278.72 KiB) Viewed 11187 times

Snap_006.jpg (246.05 KiB) Viewed 11187 times

[rudi ;-)]

@ifranzki
Ingo, i read from your pics this wireing, can you check, did you like the comments on your pic?

checking_.jpg (121.23 KiB) Viewed 11166 times

Can you read from your PICO Chip which (production) time stamp the Chip itself has
likewise 382017 or from XX2018 or 052019 or higher

Kit 4.1 has minimum knowed 2 different Version ( silkscreen change and differ )

edit 1: btw nice "T-Mount PSRAM" PCB

edit 2: FYI silicon bug REV 0 / REV 1 in ESP32

edit 3: FYI cause why not shared CLK pins with Flash CLK



See at this shematic - flash and psram have own clk pins ..
used shematic with not share the clk in design at this time where psram was started was confirmed at this time from an espressifer for NOT share the CLK pins and looks good -
the confuse was - the CLK share was in Espressif's "Datasheet's at this time" done ( shared clocks ) -

WHAM
"Sentences like 'GPIO17 and GPIO16 are used as CS and CLK' are only meant to illustrate that these two pins are in use, they are not meant to derive a pinout from (we'd use 'respectively' in that case to indicate there's an 1-to-1 match.)
"

"only illustrate" = symbolic character


the reason was -
nobody did know from us "hobbiest" here, that the silicon Rev 0 did have a CLK share problem ( more as 40 MHz ) ( not the PSRAM CHIP ) ( silicon bug in REV 0 )

espressifer's did not write here about this at this time
it was point out step by step in the psram thread i did start to point out the magic.. step by step ( salami tactic ) you got infos confirmed after you found out magic steps.. the right pins setups after you found out there are no info about ..last but not least manufacturer check of psram ...after you found it you got the confirm you have to know the psram theme was pure emotional theme and it is today the same emotional theme like it was in the past - now we have a share in the CLK's for PSRAM and Flash..

but...

this was not public at a time point in the ESP-IDF - and not spoken here in the forum
but someone get a tip -i think from an espressifer's - cause the infos was not in the ESP-IDF at this time -
to build it from start it right for a PICO with PSRAM project which does not share the CLK pin and use a swapped CS pin for the psram.
We all know the way like it was happens and why we here get no infos and have to find out the right step by step by self.

please let me know the Time Code at your PICO and are the comments are right on the pic.
then we go next step that you can run your psram on your "T-Mount-PSRAM"
you should TM your PCB like "T-Mount-PSRAM™"

btw:
the psram on the Pico-V3 and Pico-V3-02 ( what should not be possible )
is possible - but you will not get the infos here from an espressifer - how you must go on -
if you want use psram with Pico-V3 or extra ( second ) psram on a Pico-V3-02 this is/will be an other emotional PSRAM theme
that will be start in this BBS next time i think- after i got my PCB from JLCPCB for the final post here in this BBS,
i can try to make an update here again with magic psram on Pico-V3 and extra PSRAM on Pico-V3-02 and extra flash..

[ifranzki]

Hi rudi,

Ingo, i read from your pics this wiring, can you check, did you like the comments on your pic?

Yes the comments on the pic are correct, and they match the wiring on your schematic, except the shared CLK line.

I did try to use a separate CLK line for PSRAM (IO9 - see my last comment in the issue: https://github.com/espressif/esp-idf/is ... -761839678), but this did not make a difference at all.

Can you read from your PICO Chip which (production) time stamp the Chip itself has
likewise 382017 or from XX2018 or 052019 or higher

It is 382017. I do have another PICK Kit board, it has 362018, but I did not yet try to mount the PSRAM there. Do you thik its worth giving that a try?

From the boot log it seems to be chip revision 1:

Code: Select all

I (31) boot: ESP-IDF v4.3-dev-2398-g2bfdd036b2-dirty 2nd stage bootloader
I (31) boot: compile time 19:13:12
I (33) boot: chip revision: 1
I (37) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (44) boot.esp32: SPI Speed      : 40MHz
I (48) boot.esp32: SPI Mode       : DIO
I (53) boot.esp32: SPI Flash Size : 2MB

The idf.py menuconfig also allows you to configure some settings about a PSRAM/cache workaround (CONFIG_SPIRAM_CACHE_WORKAROUND), I guess this is what you mentioned as silicon bug in REV0 / REV1. Also see https://docs.espressif.com/projects/esp ... -revisions
I tried various settings there, but no difference.

you should TM your PCB like "T-Mount-PSRAM™"

I like that name "T-Mount-PSRAM"

Kind regards, Ingo

[rudi ;-)]

Hi Ingo

could you solve it in the meantime?
i was longer not reading this post, too busy too..

btw Ingo:
you can try SOFT-USB-OTG on the Pico D4 - it work's like a charme!
you can flash it over this too, need a little soft reverse change then, but for flashing enough - and no need for the CP2x.. or anything converter , anyway, soft-usb-host work's nice on a ESP32-Pico-D4 here with PSRAM also PSRAMBANK
play-station , play shield , SOFT-USB-HUB for the ESP32-PICO-D4 and so on
TryIT - DoIT!
also make the "T-Mount-PSRAM™"


best wishes
rudi


T-Mount-PSRAM™
credit: ifranzki

[ifranzki]

Hi rudi,

no unfortunately no luck...

However, I bought a TTGO T8 V1.7.1 board, and it has 4MB PSRAM (ESP-PSRAM64H chip) on the board.

And yes, it works!

Code: Select all

I (240) psram: This chip is ESP32-D0WD
I (240) psram: spiconfig: 0
I (240) psram: spiconfig: DEFAULT_SPI
I (243) psram: flash_clk_io: 6
I (246) psram: flash_cs_io: 11
I (250) psram: psram_clk_io: 17
I (254) psram: psram_cs_io: 16
I (258) psram: psram_spiq_sd0_io: 7
I (262) psram: psram_spid_sd1_io: 8
I (266) psram: psram_spiwp_sd3_io: 10
I (270) psram: psram_spihd_sd2_io: 9
I (276) spiram: Found 64MBit SPI RAM device
I (280) spiram: SPI RAM mode: flash 40m sram 40m
I (285) spiram: PSRAM initialized, cache is in low/high (2-core) mode.
...
I (1265) spiram: Adding pool of 4096K of external SPI memory to heap allocator

The SOFT-USB-OTG is cool stuff! I once did a USB host with ESP32 using a MAX3421 as USB chip. USB 2.0 only, but worked nicely as USB host as well as client.

Kind regards, Ingo