The question of i2s configuration and camera configuration

[roctwo]

Hi!
Based on the igrrs' open source project https://github.com/igrr/esp32-cam-demo , I developed my own project.As a result,maybe igrr is better suited to answering this question.In fact, I've been asking questions on his project page, but I haven't got the answer yet.
In his project,i2s isr occcurs at the end of href.But in my project,I need i2s isr to occur after the acquisition of 10 rows of data instead of the acquisition of a line.In other words,I2S fills ten rows of data into the DMA buffer at once.How to set i2s configuration and camera configuration?

[kolban]

This is a wild guess ...
A camera will generate an interrupt when a line is read (HSYNC) and when a whole image has been read (VSYNC). If we assume that the DMA processing is leveraging these external sources of interrupts then these are the only two sources available to you. There is no obvious configuration that would cause you to "wake up" ONLY when there have been 10 lines read. In theory, you could wake up on each HSYNC and test (quickly) how many times you have been woken up and do something special on the 10th. Alternatively, you could add some electronics to do divide by 10 processing on the HSYNC and relay that result to the ESP32.