Need a working example of ESP32-S2 code for ULP-FSM

[nvtby_espf]

Hi! Can anybody provide a working example of ESP32-S2 code for ULP-FSM? I checked with https://github.com/espressif/esp-idf/tr ... system/ulp but it rather works for ESP32 while I need it for -S2. The original "ulp" example project even doesn't compile if target is set for ESP32-S2.

I inserted TIMER wakeup in faulty code, see below. Really I checked various insertions into example's asm code, trying to find out whether ULP program is really running but I got no evidence of that. No ULP wakeup happens, no enforced update to "edge_count" propagates to main CPU code.

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//TODO unsupported ESP_ERROR_CHECK( esp_sleep_enable_ulp_wakeup() );
ESP_ERROR_CHECK( esp_sleep_enable_timer_wakeup(0x000000000800000) ); // quick "fix"

Beginning of the log:

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ESP-ROM:esp32s2-rc4-20191025
Build:Oct 25 2019
rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3ffe6100,len:0x4
load:0x3ffe6104,len:0x1308
load:0x4004c000,len:0x1580
load:0x40050000,len:0x1fe8
entry 0x4004c2e0
Not an ULP wakeup, initializing ULP
Entering deep sleep

Is RTC slow memory powered off in deep sleep? By default it doesn't. I have no other idea what's hapennig.

I employ ESP32-S2-WROVER, 4 Mb flash, 2 Mb PSRAM (enabled in menuconfig), so memory issues are not anticipated, Real size of binary image is about 186500 bytes. ESP-IDF code base is version 4.2.

Thanks.

[nvtby_espf]

Implementation of next function puts data into wrong register, I can guess like from ESP32 spec.

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ulp_set_wakeup_period(0, 20000);

[boarchuz]

I think that is fixed in master now.

It's still not officially supported:
viewtopic.php?t=14532

Discussion and example with partial support here:
viewtopic.php?f=13&t=16274#p61967

[nvtby_espf]

Thank you, @boarchuz. I will look into examples next days.
From what I did so far, I wrote some low level code and confirmed the FSM works fine when got forced to. Clocks look enabled. Remaining concerns are whether ULP timer really runs and is it able to wake up FSM.

[nvtby_espf]

Thanks again. After missing operations were identified by provided examples and employed into the code, all my three variants started to work as expected: software run, single timer delayed run and timer operated cyclic run. The issue has been closed.

[nvtby_espf]

Hi, this is just a status update, an information for curious minds. No need to reply.
After further investigation of mentioned official example it was found that FSM program "ulp/wake_up.S" may fall in infinite cycle waiting for RTC module ready to accept wake-up's. Here's partial log for RTC_CNTL_LOW_POWER_ST_REG (0x00CC), bits S=15 W=14 R=13 D=16 RW=19:

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       CoCPU: S W R D RW
   270 CoCPU: 1 0 0 1 0
   271 CoCPU: 0 1 1 0 0
   272 CoCPU: 0 1 1 0 0
   273 CoCPU: 0 1 1 0 0

I think, despite of the reasons why condition was not met in my case, example's code looks like anti-pattern. Real production code must employ some sort of time-out in order to avoid system to "hang".

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wake_up:
	/* Check if the system can be woken up */
	READ_RTC_FIELD(RTC_CNTL_LOW_POWER_ST_REG, RTC_CNTL_RDY_FOR_WAKEUP)
	and r0, r0, 1
	jump wake_up, eq

Good luck and have a good day everybody!