I've been trying to dive deep into the ESP32 internals, but can't quite find all the information I'm looking for.
I'm trying to understand the process that configures the SPI flash for usage. Here are the couple points that I'm stuck on.
- I know that the ESP32 uses external flash for storing program data and instructions. This external flash is written to via the first-stage bootloader (the one in ROM that esptool communicates with) during programming. My question is, how does the first-stage bootloader know how to communicate with the SPI flash? For example, how does it know the op-codes used to program the SPI flash? The IS25LP128 flash chip works with the ESP32. How does the first stage bootloader know that the op-code for a chip-erase command on this IC is 0xC7/0x60? How could the ESP32 use a flash chip that had a chip-erase op-code of, say, 0x50?
- If I have a constant string defined as "char test_string[] = "Hello world!";", I know that the address of "test_string" will be a virtual memory address that the MMU maps to a physical address in flash. If I access "test_string" in my C code, how does the ESP32 know to initiate an SPI transaction to retrieve the string from flash? Does the MMU have a hardware-based SPI master driver that deals with retrieval, or is retrieval controlled by code? If it is controlled by code, where is that code? And (going back to the previous point), where are the op-codes to initiate an "SPI read" defined for when I access "test_string"? Where are things like the SPI flash chip's address width defined? (24 bits for 16MB, 20 bits for 1MB, etc).
- Say I had a custom flash IC that worked via a parallel interface and some shift registers. It looks like (from the ESP32 perspective) that it's a normal SPI flash chip. But, say the read/write op-codes were different, address/data bus-width was different, etc. Would there be any hope of being able to use this, or is the SPI flash interface defined totally in the unmodifiable 1st stage bootloader?
I feel like the MMU takes over a lot of the SPI transactions between SPI flash / SPI SRAM, but I have no idea where to look to begin understanding how it works, or how it gets initiated when I access a string in C code. The technical reference manual mentions the MMU, SPI, and SPI flash, but gives no details on how the low-level SPI transactions to these components are configured or controlled.
I would so appreciate any guidance or info!
Thanks,
Casey