I have to continuously monitor and process ADC samples. But in order to meet power consumption requirements, the supply current of the ESP32 needs to stay below 1mA.
It seems to be infeasible to achieve this specification with a CPU frequency of 80 MHz. Can I perhaps meet the power requirements and still have a ADC sampling rate of at least 10kHz when running the CPU at 2 MHz?
I tried to change the CPU frequency with
#include "soc/rtc.h" [...] rtc_clk_cpu_freq_set(RTC_CPU_FREQ_2M)
.. but had no luck: Right after "cpu_start: Starting scheduler on APP CPU", I neither receive debugging- nor custom massages anymore over UART. I suppose that the peripheral clocks have to be reconfigured, but I have no idea how to accomplish this.
How to lower CPU frequency
Re: How to lower CPU frequency
To reduce the CPU speed and reduce power, your best choice is probably to enable dynamic frequency scaling:
http://esp-idf.readthedocs.io/en/latest ... ement.html
The default behaviour is to set minimum frequency to the crystal frequency (usually 40MHz), but you can set it lower by calling esp_pm_configure() with custom parameters:
http://esp-idf.readthedocs.io/en/latest ... nfigurePKv
That said, frequency scaling alone may not be enough to get you below 1mA. The ULP (Ultra Low Power) processor is more or less custom designed for this kind of use case - the main CPU goes into deep sleep and the ULP periodically collects ADC samples and wakes the main CPU up as necessary:
https://esp-idf.readthedocs.io/en/lates ... s/ulp.html
http://esp-idf.readthedocs.io/en/latest ... ement.html
The default behaviour is to set minimum frequency to the crystal frequency (usually 40MHz), but you can set it lower by calling esp_pm_configure() with custom parameters:
http://esp-idf.readthedocs.io/en/latest ... nfigurePKv
That said, frequency scaling alone may not be enough to get you below 1mA. The ULP (Ultra Low Power) processor is more or less custom designed for this kind of use case - the main CPU goes into deep sleep and the ULP periodically collects ADC samples and wakes the main CPU up as necessary:
https://esp-idf.readthedocs.io/en/lates ... s/ulp.html
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