ESP32-P4: FB_DCDC Pin Function

[shraiwi]

Hi there,

I am currently using the ESP32-P4 to prototype an embedded product integrating a PMIC controlled via I2C. However, this would negate the need for an external feedback network, preventing me from connecting the FB_DCDC pin. I was wondering what the exact function of the FB_DCDC pin was? In the hardware design guidelines, the FB_DCDC pin is described as:

the feedback pin of the external DCDC, which regulates the voltages of VDDHP_0/1/2/3 together with software and external DCDC feedback resistors.

Does this mean that the pin is designed to regulate VDDHP_[0-3] digitally? Additionally, is it required for correct operation of the HP processors?

Thanks!

[jjsch-dev]

Hello everyone,

I am working on a project with the ESP32-P4 and noticed some changes in the power supply design between versions of Espressif's development kit schematic and Nano.

In Nano versions, the MP1605GTF-Z regulator was used to generate the VDD_HP power supply, with its FB pin connected to the ESP32-P4’s FB_DCDC pin. Recently, in an updated schematic (v1.5 of the ESP32-P4 Function EV Board), Espressif replaced the MP1605GTF-Z with the TLV62569 regulator.

Now, I have two viable regulator options for my design: the MP1605GTF-Z and the TLV62569.

Additionally, I noticed that the VDDPST_LDO pin in the updated schematic is connected to the 3.3V output of the TLV62569 regulator.

I have the following questions:

Criteria for Selecting the Regulator IC:

What should I consider when choosing between these two regulators or any other potential replacements?
How do I ensure compatibility with the feedback mechanism controlled by the ESP32-P4 through FB_DCDC?
Should I prioritize specific reference voltages (e.g., 0.8V, 1.0V) or other features like dynamic stability?
Purpose of the VDDPST_LDO Pin:

What is the exact purpose of the VDDPST_LDO pin?
How does it interact with the 3.3V regulator output, and what role does it play in the ESP32-P4’s power management and IO operation?

"Hardware Design Guidelines" for ESP32-P4:
I’ve heard of a "Hardware Design Guidelines" document for the ESP32-P4, but I haven’t been able to locate it. If anyone can share this document or provide guidance on power supply design for the ESP32-P4, it would be greatly appreciated.
Any insights or shared experiences regarding dynamic feedback control, regulator selection, or the VDDPST_LDO pin would be extremely helpful.

Thanks in advance for your advice!