What would you like to see in The Next Chip?
Re: What would you like to see in The Next Chip?
1. Fix I2C controller, transaction continuations in particular: ACK clocking should not be delayed until next batch of data and also the controller should, like, stop going haywire from time to time. currently I2C controller is unusable because of this. https://github.com/espressif/esp-idf/issues/606
2. Allow using the flash encryption key to be used to encrypt arbitrary data (submitted to registers, like normal AES block). Or perhaps add ability to "connect" the AES block to efuse block for key material. The point is to be able to use securely stored key in not just flash encryption operations, but any arbitrary crypto. This will not compromise security in any way, as AES is resistant to plain text attacks.
3. PSRAM encryption. When flash encryption is enabled, external PSRAM accesses must go through enc/dec block as well. It's simply not an option to have plain text data going via an easy to tap bus such as SPI.
2. Allow using the flash encryption key to be used to encrypt arbitrary data (submitted to registers, like normal AES block). Or perhaps add ability to "connect" the AES block to efuse block for key material. The point is to be able to use securely stored key in not just flash encryption operations, but any arbitrary crypto. This will not compromise security in any way, as AES is resistant to plain text attacks.
3. PSRAM encryption. When flash encryption is enabled, external PSRAM accesses must go through enc/dec block as well. It's simply not an option to have plain text data going via an easy to tap bus such as SPI.
Re: What would you like to see in The Next Chip?
Hi,
1) DPI/LVDS or MIPI DSI interface and if it is possible/cost efficient very simple CAM interface, ntsc decoder maybe.
2) Hardware accelerated graphics
3) Hardware decoder for common audio and video codecs + APTX Bluetooh Audio codec.
4) I am not talking about HD video
5) More I2S or anything related with audio would be so good.
6) Native USB 2.0 Host, if it is possible/cost efficient slave too.
My two cents.
1) DPI/LVDS or MIPI DSI interface and if it is possible/cost efficient very simple CAM interface, ntsc decoder maybe.
2) Hardware accelerated graphics
3) Hardware decoder for common audio and video codecs + APTX Bluetooh Audio codec.
4) I am not talking about HD video
5) More I2S or anything related with audio would be so good.
6) Native USB 2.0 Host, if it is possible/cost efficient slave too.
My two cents.
Re: What would you like to see in The Next Chip?
- Support for larger flash memory or support for adding a 2nd flash memory chip to extend flash
- USB
- CAN bus with a slower clock source so we can support all standard CAN bitrates (currently 10kbps and 20kbps are not possible)
- 2 more UARTs (once you add a 4G modem and GPS you quickly run out of them as only 2 of the 3 are usable for apps, one is dedicated as programming port)
- Proper automatic RS-485 half-duplex control
- Programming flash memory using JTAG
- A linear ADC
- A few more GPIO
- An option to battery buffer the RTC
- USB
- CAN bus with a slower clock source so we can support all standard CAN bitrates (currently 10kbps and 20kbps are not possible)
- 2 more UARTs (once you add a 4G modem and GPS you quickly run out of them as only 2 of the 3 are usable for apps, one is dedicated as programming port)
- Proper automatic RS-485 half-duplex control
- Programming flash memory using JTAG
- A linear ADC
- A few more GPIO
- An option to battery buffer the RTC
Re: What would you like to see in The Next Chip?
A fully functioning chip at 1.8V (flash and wifi)
(3.3v will soon go obsolete, just like 5v)
(3.3v will soon go obsolete, just like 5v)
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Re: What would you like to see in The Next Chip?
- Sub-1GHz hardware: We'll see what we can do.
- Zigbee, open-thread etc... don't count on it. While I can't look into the future, at the moment WiFi/BT seem to be a winning combo on the 2.4GHz front.
- DSP-core/HW audio support: We're looking into this. Issue is that we want something that has good open-source compiler support: we don't want people to only be able to use this when they sign an NDA.
- Fix I2C, allow encryprion from 'secret' key, PSRAM encryption: All noted.
- DPI/LVDS/MIPI: Will look into this. Iirc Mipi/DPI are closed, however, licensing may not be worth our effort.
- Hardware accelerated graphics: What do you have in mind with that? Can you give us an use case or two?
- USB2.0: Will look into this. We definitely will have USB integrated somewhere along the line; don't know if it's going to be 2.0, however.
- Larger flash: What do you need this for? Do you only need somewhere to dump a filesystem on, or do you also need to have flash cache working on this? If the former, we may be able to whip up something within the esp32 framework...
- Slower clock on CAN-bus: check
- More uarts: Will look into this, but don't hold your breath... at a certain point, the cost/efficiently curve of adding more of $PERIPHERAL just gets too steep.
- RS-485 half-duplex, programming flash over JTAG: Those are sw problems, and we already do the second one in the latest esp-idf/openocd releases.
- Linear ADC: Check.
- More GPIO: Noted.
- Battery-buffered RTC: Yes, you're not the only one missing this. We have an internal discussion on how to fix this in the next chip.
- 1.8V chip: We're actually almost there: I think the ESP32 can function at 2.2V or so.
- Zigbee, open-thread etc... don't count on it. While I can't look into the future, at the moment WiFi/BT seem to be a winning combo on the 2.4GHz front.
- DSP-core/HW audio support: We're looking into this. Issue is that we want something that has good open-source compiler support: we don't want people to only be able to use this when they sign an NDA.
- Fix I2C, allow encryprion from 'secret' key, PSRAM encryption: All noted.
- DPI/LVDS/MIPI: Will look into this. Iirc Mipi/DPI are closed, however, licensing may not be worth our effort.
- Hardware accelerated graphics: What do you have in mind with that? Can you give us an use case or two?
- USB2.0: Will look into this. We definitely will have USB integrated somewhere along the line; don't know if it's going to be 2.0, however.
- Larger flash: What do you need this for? Do you only need somewhere to dump a filesystem on, or do you also need to have flash cache working on this? If the former, we may be able to whip up something within the esp32 framework...
- Slower clock on CAN-bus: check
- More uarts: Will look into this, but don't hold your breath... at a certain point, the cost/efficiently curve of adding more of $PERIPHERAL just gets too steep.
- RS-485 half-duplex, programming flash over JTAG: Those are sw problems, and we already do the second one in the latest esp-idf/openocd releases.
- Linear ADC: Check.
- More GPIO: Noted.
- Battery-buffered RTC: Yes, you're not the only one missing this. We have an internal discussion on how to fix this in the next chip.
- 1.8V chip: We're actually almost there: I think the ESP32 can function at 2.2V or so.
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Re: What would you like to see in The Next Chip?
Probably something like the STM32 Chrom-ART? One use case is everything with a bitmapped GUI. Seems useful:ESP_Sprite wrote: - Hardware accelerated graphics: What do you have in mind with that? Can you give us an use case or two?
http://www.st.com/content/ccc/resource/ ... _DMA2D.pdf
Re: What would you like to see in The Next Chip?
A coprocessor or small gpu unit which can decode several audio & video formats and output it through LVDS/DPI etc... For example a simple use case can be small panels which remote connects to a desktop or an application. For example; Android already can stream applications and desktop over network with h265 and mpeg4 codec. Same gpu can also get cam data and encode, so esp can stream it to the network.BuddyCasino wrote:Probably something like the STM32 Chrom-ART? One use case is everything with a bitmapped GUI. Seems useful:ESP_Sprite wrote: - Hardware accelerated graphics: What do you have in mind with that? Can you give us an use case or two?
http://www.st.com/content/ccc/resource/ ... _DMA2D.pdf
But actually I have no idea how complicated and how expensive to implement such thing.
Re: What would you like to see in The Next Chip?
From the peripheral interfaces perspective, i would love to see more UART channels.
Re: What would you like to see in The Next Chip?
It would be nice if we could do these things as easily:ESP_Sprite wrote: - Hardware accelerated graphics: What do you have in mind with that? Can you give us an use case or two?
Design: https://www.youtube.com/watch?v=PL3enedXTs4
Interaction: https://www.youtube.com/watch?v=QcKX_Pc6ldU
Re: What would you like to see in The Next Chip?
Seems as though some people want low power low cost chip for battery powered nodes and others want a workhorse with audio/video features. Sounds like 2 different chips.
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