[Q] Chip Revision in difference SoC's

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rudi ;-)
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Joined: Fri Nov 13, 2015 3:25 pm

[Q] Chip Revision in difference SoC's

Postby rudi ;-) » Sun Aug 27, 2017 9:10 pm

hi
we know ESP32 has silicon rev 0 and rev 1.
there is a ECO and Workarounds for Bugs in ESP32.

Is this silicon revision also applicable to others?

example:
D2WD is rev 0
Pico-D4 is rev 0

Code: Select all

CHIP_VERSION           Chip version                                      = 0 R/W (0x0)
can we say, that they have the same silicon like the ESP32 rev 0
and we need to note the ECO and Workarounds for Bugs in ESP32
or have they "own" silicon revision number's and is not compare with this?

txs

best wishes
rudi ;-)
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ESP_Sprite
Posts: 9835
Joined: Thu Nov 26, 2015 4:08 am

Re: [Q] Chip Revision in difference SoC's

Postby ESP_Sprite » Mon Aug 28, 2017 2:37 am

The 'base' ESP32 silicon is the same; it's just packaged differently (with/without flash, SIP or QFN package) so the revisions are valid in the D2 and SIP packages as well.

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