ESP32-S2 External RAM / PSRAM + I2S LCD + DMA

[faptastic]

Hello.

The TRM seems to imply that one can create a buffer in PSRAM memory, and use EDMA to send out via the I2S peripheral (for parallel output LCD mode).

However, any attempts I try produce garbage output when any of the buffer is allocated to the ESP32-S2's PSRAM.

What is this the case? The TRM seems to imply this is possible. However, I have not been able to find any examples.

[liaifat85]

You can allocate critical buffers that require high-speed access in internal SRAM instead of PSRAM. You can use PSRAM for less critical data that doesn’t need high-speed access.

[faptastic]

I don't want to use the SRAM. I want to use the PSRAM.

The TRM says you can use it for I2S and LCD output, but I there's no guidance anywhere on how to achieve this in code.

[ESP_Sprite]

It should just work like internal RAM, with the exception that your memory needs to be aligned to the cache line size of the psram cache. Also, you need to make sure data is not stuck in that cache, as the CPU reads/writes from cache while DMA interacts directly with the underlying PSRAM; this means that you'll need to flush the cache for the data memory before starting the DMA transfer. Also note that DMA descriptors can only be in internal RAM.

[faptastic]

Thanks ESP_Sprite.

If I used say the esp-camera example (https://github.com/espressif/esp32-camera) and re-write it to be an LCD output instead, do you think that could potentially do the trick? I see a bunch of PSRAM data alignment stuff in this code.

[ESP_Sprite]

Erm, possibly? It certainly has a lot of the components you'd need.

[faptastic]

For those that might be interested I figured it out and it was indeed per what Sprite_TM stated.

Use of the function

Code: Select all

Cache_WriteBack_Addr

in the code solves for the issue.

I can now clock out 24bits (3 bytes) in parallel at about 6Mhz from SPIRAM via. the I2S 'LCD Mode'.

https://github.com/mrcodetastic/esp32s2 ... /tree/main